公开(公告)号：EP0205760A1

公开(公告)日：1986-12-30

申请号：EP86103212

申请日：1986-03-11

Applicant: IBM

Inventor： BEHA JOHANNES GEORG ,  DREYFUS RUSSELL EARREN ,  RUBLOFF GARY WAYNE

IPC: G01R31/26 ,  G01Q30/02 ,  G01Q30/16 ,  G01Q30/20 ,  G01R31/308 ,  H01L21/66 ,  G01R31/28

CPC classification number: G01R31/308

Abstract: Simultaneous noncontact testing of voltages across a full line of test sites (2) on an integrated circuit chip-to-test (1) is achieved with high time resolution using photoelectron emission induced by a pulsed laser (3) focussed to a line (4) on the chip-to-test, together with high speed electrostatic deflection perpendicular to the line focus. Photoelectrons produced by the line focus of pulsed laser light are imaged to a line on an array detector (5), the measured photoelectron intensities at array points along this line representing voltages at corresponding points along the line illuminated by the laser focus. High speed electrostatic deflection applied to plates (7) during the laser pulse, perpendicular to the direction of the line focus, disperses the line image - (column) on the array detector across a sequence of sites at right angles (rows), thereby revealing the time-dependence of voltages in the column of test sites with high time resolution (in the picosecond
' range).

公开(公告)号：DE3675236D1

公开(公告)日：1990-12-06

申请号：DE3675236

申请日：1986-03-04

Applicant: IBM

Inventor： BEHA JOHANNES GEORG ,  DREYFUS RUSSELL EARREN ,  HARTSTEIN ALLAN MARK ,  RUBLOFF GARY WAYNE

IPC: G01R31/28 ,  G01R31/308 ,  H01L21/66 ,  H01L23/544

Abstract: The method comprising covering metal test pads (4) of an integrated circuit chip-to-test (11), with a photon-transmissive passivation layer (2) susceptible to photon assisted tunneling, covering the layer (2) with a thin conductive photon-transparent overlayer (3), and then accessing the test pads through the passivation layer and conductive overlayer, by a pulsed laser to provide voltage-modulated photon-assisted tunneling through the insulation layer, to the conductive overlayer as an electron current, and detecting the resulting electron current, thus providing a nondestructive test of integrated circuits. The passivation, normally present to protect the integrated circuit, also lowers the threshold for photoelectron emission. The conductive overlayer acts as a photoelectron collector for the detector. A chip-to-test which is properly designed for photon assisted tunneling testing has test sites accessible to laser photons even though passivated. Such a chip-to-test may be nondestructively tested in air at one or several stages of its processing, without the sacrifices of mechanical probing or of bringing test sites out to output pads.

公开(公告)号：DE3667547D1

公开(公告)日：1990-01-18

申请号：DE3667547

申请日：1986-03-11

Applicant: IBM

Inventor： BEHA JOHANNES GEORG ,  DREYFUS RUSSELL EARREN ,  RUBLOFF GARY WAYNE

IPC: G01R31/26 ,  G01Q30/02 ,  G01Q30/16 ,  G01Q30/20 ,  G01R31/308 ,  H01L21/66 ,  G01R31/28

Abstract: Simultaneous noncontact testing of voltages across a full line of test sites (2) on an integrated circuit chip-to-test (1) is achieved with high time resolution using photoelectron emission induced by a pulsed laser (3) focussed to a line (4) on the chip-to-test, together with high speed electrostatic deflection perpendicular to the line focus. Photoelectrons produced by the line focus of pulsed laser light are imaged to a line on an array detector (5), the measured photoelectron intensities at array points along this line representing voltages at corresponding points along the line illuminated by the laser focus. High speed electrostatic deflection applied to plates (7) during the laser pulse, perpendicular to the direction of the line focus, disperses the line image - (column) on the array detector across a sequence of sites at right angles (rows), thereby revealing the time-dependence of voltages in the column of test sites with high time resolution (in the picosecond ' range).