公开(公告)号：JP2002124672A

公开(公告)日：2002-04-26

申请号：JP2001193470

申请日：2001-06-26

Applicant: IBM

Inventor： CLEVENGER LAWRENCE ALFRED ,  MANDELMAN JACK A ,  JAMMY RAJARO ,  GLUSCHENKOV OLEG ,  MCSTAY IRENE LENNOX ,  WONG KWONG HON ,  FALTERMEIER JONATHAN

IPC: H01L29/43 ,  H01L21/28 ,  H01L21/336 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To provide a gate structure for MOSFETs for application of the CMOS technology, etc., which is durable against high temperature processes such as junction activation, etc., and reduces the gate propagation delay. SOLUTION: The gate structure 10 has an insulation layer 14 on a semiconductor substrate 12, and a polysilicon gate electrode 16 on the insulation layer 14. The gate structure 10 comprises a diffused barrier layer 20 having semi- insulative characteristics on the gate electrode 16, and a gate conductor 18 on the barrier layer 20. The conductor 18 is electrically contacted to the gate electrode 16. The constitution and the thickness of the barrier layer 20 are adjusted so as to effectively block the diffusion and the mixing between the gate conductor 18 and the gate electrode 16, but realize a capacitive coupling and/or a leak current not so increasing the gate propagation delayer of the gate surface 10.

公开(公告)号：JPH11265992A

公开(公告)日：1999-09-28

申请号：JP1040499

申请日：1999-01-19

Applicant: SIEMENS AG ,  IBM

Inventor： ILG MATTHIAS ,  FALTERMEIER JONATHAN ,  SRINIVASAN RADHIKA

IPC: H01L21/28 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/49

Abstract: PROBLEM TO BE SOLVED: To form a sure gate conductor which is lessened in thickness and sheet resistance, by a method wherein a metal silicide layer doped with dopant in situ is deposited on a doped polysilicon layer. SOLUTION: A thin gate oxide layer 220 is formed on the surface of a substrate 201, a polysilicon layer 230 is deposited thereon through a chemical deposition method. Typically, the polysilicon layer 330 contains dopant so as to be lessened in resistivity. Then, a metal silicide layer 240 is deposited on the polysilicon layer 230. The silicide layer 240 which is doped so as to be used as a dopant source is provided, whereby a polysilicon layer can be formed being lower in dopant concentration than that which generates a metal-rich boundary surface. Therefore, a polysilicon layer of a gate stack is more enhanced in dopant concentration without being increased in thickness so as to avoid a metal-rich boundary surface, and the sure gate stack lessened in sheet resistance can be obtained.