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公开(公告)号:DE3069456D1
公开(公告)日:1984-11-22
申请号:DE3069456
申请日:1980-07-24
Applicant: IBM
Inventor: CLEMEN RAINER , FISCHER WALTER , HAUG WERNER
IPC: H03K5/00 , H03K5/02 , H03K19/0185 , H03K19/094
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公开(公告)号:CA954233A
公开(公告)日:1974-09-03
申请号:CA158254
申请日:1972-12-05
Applicant: IBM
Inventor: FISCHER WALTER , MASTAI ALDO J , ROCHER EDOUARD Y
IPC: H01L27/04 , G05F1/56 , H01L21/331 , H01L21/822 , H01L27/02 , H01L27/06 , H01L29/66 , H01L29/73 , H01L29/74 , H01L29/78 , H02H7/20
Abstract: An over voltage protection circuit, especially adapted for the protection of field effect transistor gate dielectric material and other circuit structures against high voltage, high peak current, short duration impulses such as produced by static electricity. The gate of the protected FET is shunted to ground by a lateral bipolar transistor whose collector junction is passivated by a layer of silicon dioxide thinner than the passivation layer at other locations. The silicon dioxide layer is covered by a metallization layer which extends from above the collector junction and makes contact to the emitter and to the substrate. The substrate contact is connected to a source of fixed potential. The collector is connected to the gate of the protected FET.
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公开(公告)号:DE2257846A1
公开(公告)日:1973-06-20
申请号:DE2257846
申请日:1972-11-25
Applicant: IBM
Inventor: FISCHER WALTER , MASTAI ALDO JOSEF , ROCHER EDOUARD YVES
IPC: H01L27/04 , G05F1/56 , H01L21/331 , H01L21/822 , H01L27/02 , H01L27/06 , H01L29/66 , H01L29/73 , H01L29/74 , H01L29/78 , H02H7/20 , H01L19/00
Abstract: An over voltage protection circuit, especially adapted for the protection of field effect transistor gate dielectric material and other circuit structures against high voltage, high peak current, short duration impulses such as produced by static electricity. The gate of the protected FET is shunted to ground by a lateral bipolar transistor whose collector junction is passivated by a layer of silicon dioxide thinner than the passivation layer at other locations. The silicon dioxide layer is covered by a metallization layer which extends from above the collector junction and makes contact to the emitter and to the substrate. The substrate contact is connected to a source of fixed potential. The collector is connected to the gate of the protected FET.
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公开(公告)号:CA716439A
公开(公告)日:1965-08-24
申请号:CA716439D
Applicant: IBM
Inventor: HASLER WERNER , FISCHER WALTER , REINGRUBER ENGELBERT , KORBER CARL , HILPERT FRITZ , EITELJORGE ADHILD , SCHEERER WALTER , HEIMBRECHT HANS , REHWALD WILLI , SCHARR WALTER
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