-
公开(公告)号:AU2015238662B2
公开(公告)日:2017-12-14
申请号:AU2015238662
申请日:2015-03-16
Applicant: IBM
Inventor: HELLER LISA CRANTON , BRADBURY JONATHAN DAVID , KUBALA JEFFREY PAUL , FARRELL MARK , OSISEK DAMIAN LEO , GREINER DAN , SLEGEL TIMOTHY , BUSABA FADI YUSUF , SCHMIDT DONALD WILLIAM , GAINY JR CHARLES
Abstract: A computer system includes a virtual machine (VM) configuration with one or more cores. Each core is enabled to operate in a single thread (ST) mode or a multithreading (MT) mode. The ST mode consists of a single thread and the MT mode consists of a plurality of threads on shared resources of a respective core. The computer system includes a core-oriented system control area (COSCA) having a common area representing all of the cores of the VM configuration and separate core description areas for each of the cores in the VM configuration. Each core description area indicates a location of one or more thread description areas each representing a thread within the respective core, and each thread description area indicates a location of a state description of the respective thread.
-
公开(公告)号:AU2015238662A1
公开(公告)日:2016-08-04
申请号:AU2015238662
申请日:2015-03-16
Applicant: IBM
Inventor: HELLER LISA CRANTON , BRADBURY JONATHAN DAVID , KUBALA JEFFREY PAUL , FARRELL MARK , OSISEK DAMIAN LEO , GREINER DAN , SLEGEL TIMOTHY , BUSABA FADI YUSUF , SCHMIDT DONALD WILLIAM , GAINY JR CHARLES
Abstract: A computer system includes a virtual machine (VM) configuration with one or more cores. Each core is enabled to operate in a single thread (ST) mode or a multithreading (MT) mode. The ST mode consists of a single thread and the MT mode consists of a plurality of threads on shared resources of a respective core. The computer system includes a core-oriented system control area (COSCA) having a common area representing all of the cores of the VM configuration and separate core description areas for each of the cores in the VM configuration. Each core description area indicates a location of one or more thread description areas each representing a thread within the respective core, and each thread description area indicates a location of a state description of the respective thread.
-