Instruction execution system for super-scalar processor

    公开(公告)号:DE19804146A1

    公开(公告)日:1998-09-17

    申请号:DE19804146

    申请日:1998-02-03

    Applicant: IBM

    Abstract: The system has at least one command supply unit. A command buffer stores commands and specifies the source operand and the target operand of the commands. An operand is specified as a target operand of a first command in the buffer and as a source operand of a second command in the buffer. The system has an output device to output the commands to one of the command supply units. The output device outputs a command when all source operands of the command are sufficient. The system also has a display device to show the source operands of the second command as sufficient after the first command is output to a first command supply unit and before the value of the operands is provided.

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