公开(公告)号：DE3467080D1

公开(公告)日：1987-12-03

申请号：DE3467080

申请日：1984-02-22

Applicant: IBM DEUTSCHLAND ,  IBM

Inventor： BAIER HEINZ ING GRAD ,  KALLMEYER MICHAEL ING GRAD ,  KOEPP PETER ,  PFEFFER ERWIN DIPL ING ,  SCHNEIDERHAN MARTIN

IPC: B41J17/30 ,  B41J17/36 ,  G02B7/36 ,  H04N5/232 ,  H04N5/225 ,  G03B3/10

Abstract: The system has a comparator (2) comparing two limit signals (L.H) with picture signals (A) of continuously increasing or decreasing intensity. The limits define a window. The comparator's output is 01Ded!(4)!with!the!output!from!a!clock!(3).!The!ANDed!gate's output is a sequence of timing pulses whose number reflects changes in the picture signal. A counter (5) counts the timing pulses over a given time and stores the resulting count in a buffer (6). The min. count for various focus settings is chosen as the one giving the sharpest focus.

公开(公告)号：DE19804146A1

公开(公告)日：1998-09-17

申请号：DE19804146

申请日：1998-02-03

Applicant: IBM

Inventor： GETZLAFF KLAUS DIPL ING ,  LEPPLA BERND DIPL ING ,  PFEFFER ERWIN DIPL ING ,  PFLUEGER THOMAS DIPL ING ,  WITHELM BIRGIT

IPC: G06F9/38

Abstract: The system has at least one command supply unit. A command buffer stores commands and specifies the source operand and the target operand of the commands. An operand is specified as a target operand of a first command in the buffer and as a source operand of a second command in the buffer. The system has an output device to output the commands to one of the command supply units. The output device outputs a command when all source operands of the command are sufficient. The system also has a display device to show the source operands of the second command as sufficient after the first command is output to a first command supply unit and before the value of the operands is provided.

公开(公告)号：DE69831282T2

公开(公告)日：2006-08-10

申请号：DE69831282

申请日：1998-02-05

Applicant: IBM

Inventor： GAERTNER UTE ,  GETZLAFF KLAUS JOERG DIPL ING ,  KOEHLER THOMAS DIPL ING ,  PFEFFER ERWIN DIPL ING

IPC: G06F9/38 ,  G06F9/30

Abstract: The invention relates to the area of register renaming and allocation in superscalar computer systems. When a multitude of instructions in the instruction stream reads from or writes to a certain logical register, said logical register will have to be represented by a multitude of physical registers. Therefore, there have to exist several physical rename registers per logical register. The oldest one of said rename registers defines the architected state of the computer system, the in-order state. The invention provides a method for administration of the various register instances. Both the registers representing the in-order state and the various rename instances are kept in one common circular buffer. There exist two pointers per logical register: The first one, the in-order pointer, points to the register that represents the in-order state, the second one, the rename pointer, points to the most recent rename instance.