公开(公告)号：DE19804146A1

公开(公告)日：1998-09-17

申请号：DE19804146

申请日：1998-02-03

Applicant: IBM

Inventor： GETZLAFF KLAUS DIPL ING ,  LEPPLA BERND DIPL ING ,  PFEFFER ERWIN DIPL ING ,  PFLUEGER THOMAS DIPL ING ,  WITHELM BIRGIT

IPC: G06F9/38

Abstract: The system has at least one command supply unit. A command buffer stores commands and specifies the source operand and the target operand of the commands. An operand is specified as a target operand of a first command in the buffer and as a source operand of a second command in the buffer. The system has an output device to output the commands to one of the command supply units. The output device outputs a command when all source operands of the command are sufficient. The system also has a display device to show the source operands of the second command as sufficient after the first command is output to a first command supply unit and before the value of the operands is provided.

公开(公告)号：DE69123725T2

公开(公告)日：1997-06-12

申请号：DE69123725

申请日：1991-04-30

Applicant: IBM

Inventor： WEISS ULRICH ,  KNAUFT GUENTER ,  SCHMUNKAMP DIETMAR DIPL ING ,  LEPPLA BERND DIPL ING

IPC: H03K5/15

Abstract: An electrical circuit is described for generating clock pulses for a multi-chip computersystem which contains a clock generation chip and various logic circuit chips. The clock pulses used on the logic circuit chips are generated on the clock generation chip and are transferred to the logic circuit chips. For the generation of the clock pulses a so-called clocksplitter circuit is provided on the clock generation circuit. This clocksplitter generates two pulse strings out of a third pulse string which is derived from an oscillator. The clocksplitter contains a number of gates and latches which have an impact on the throughput time of a pulse to run through the clocksplitter, as well as on the skew of the two generated pulse strings. The invention provides an electrical circuit which has an improved throughput time and skew of the generated pulse strings.

公开(公告)号：DE69123725D1

公开(公告)日：1997-01-30

申请号：DE69123725

申请日：1991-04-30

Applicant: IBM

Inventor： WEISS ULRICH ,  KNAUFT GUENTER ,  SCHMUNKAMP DIETMAR DIPL ING ,  LEPPLA BERND DIPL ING

IPC: H03K5/15

Abstract: An electrical circuit is described for generating clock pulses for a multi-chip computersystem which contains a clock generation chip and various logic circuit chips. The clock pulses used on the logic circuit chips are generated on the clock generation chip and are transferred to the logic circuit chips. For the generation of the clock pulses a so-called clocksplitter circuit is provided on the clock generation circuit. This clocksplitter generates two pulse strings out of a third pulse string which is derived from an oscillator. The clocksplitter contains a number of gates and latches which have an impact on the throughput time of a pulse to run through the clocksplitter, as well as on the skew of the two generated pulse strings. The invention provides an electrical circuit which has an improved throughput time and skew of the generated pulse strings.