公开(公告)号：DE19614481A1

公开(公告)日：1997-10-16

申请号：DE19614481

申请日：1996-04-12

Applicant: IBM

Inventor： WILLE UDO ,  GETZLAFF KLAUS-JOERG ,  WITHELM BIRGIT ,  TAST HANS-WERNER

IPC: G06F12/0897 ,  G06F12/08 ,  G06F13/16 ,  G06F15/16

Abstract: The second order cache memory (L2) has a directory (9) which stores an address i and validity bit Vi(L1) for each of its memory sectors Yi. The value of each validity bit depends on whether the contents of sector Yi are also stored in the corresponding sector Zj of a first order cache memory (L1). Both cache memories store the V-, MC- and C-bits used for MESI cache protocol.