METHODS AND APPARATUS FOR CONTAMINATION CONTROL IN PLASMA PROCESSING

    公开(公告)号:CA2024637A1

    公开(公告)日:1991-04-24

    申请号:CA2024637

    申请日:1990-09-05

    Applicant: IBM

    Abstract: FI9-89-005 METHODS AND APPARATUS FOR CONTAMINATION CONTROL IN PLASMA PROCESSING Contamination levels in plasma processes are reduced during plasma processing, by prevention of formation of particles, by preventing entry of particles externally introduced or by removing particles spontaneously formed from chemical and/or mechanical sources. Some techniques for prevention of formation of particles include interruption of the plasma by pulsing the source of plasma energy periodically, or application of energy to provide mechanical agitation such as mechanical shockwaves, acoustic stress, ultrasonic stress, vibrational stress, thermal stress, and pressure stress. Following a period of applied stress, a tool is pumped out (if a plasma is used, the glow is first discontinued), vented, opened and flaked or particulate material is cleaned from the lower electrode and other surfaces. A burst of filtered air or nitrogen, or a vacuum cleaner is used for removal of deposition debris while the vented tool is open. Following this procedure, the tool is then be used for product runs. Alternatively, improvement of semiconductor process yields can be achieved by addition of reagents to getter chemical precursors of contamination particulates and by filtration of particulates from feedgas before plasma processing. The efficiency and endpoint for the applied stress are determined, by laser light scattering, using a pulsed or continuous laser source, e.g. a HeNe laser.

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    发明专利
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    公开(公告)号:DE69836117T2

    公开(公告)日:2007-04-19

    申请号:DE69836117

    申请日:1998-07-28

    Applicant: SIEMENS AG IBM

    Abstract: A "porous barrier" is formed without formation of a discrete barrier layer by enriching grain boundaries of a body of polysilicon with nitrogen to inhibit thermal mobility of silicon species therealong. In a polycide gate/interconnect structure, the reduced mobility of silicon suppresses agglomeration of silicon in a metal silicide layer formed thereon. Since silicon agglomeration is a precursor of a polycide inversion phenomenon, polycide inversion which can pierce an underlying oxide and cause device failure is effectively avoided. The increased thermal stability of polycide structures and other structures including a body of polysilicon thus increases the heat budget that can be withstood by the structure and increases the manufacturing process window imposed by the presence of polysilicon which can be exploited in other processes such as annealing to develop a low resistance phase of refractory metal silicide included in the polycide structure, drive-in annealing for formation of source/drain regions of field effect transistors and the like.

    6.
    发明专利
    未知

    公开(公告)号:DE69836117D1

    公开(公告)日:2006-11-23

    申请号:DE69836117

    申请日:1998-07-28

    Applicant: SIEMENS AG IBM

    Abstract: A "porous barrier" is formed without formation of a discrete barrier layer by enriching grain boundaries of a body of polysilicon with nitrogen to inhibit thermal mobility of silicon species therealong. In a polycide gate/interconnect structure, the reduced mobility of silicon suppresses agglomeration of silicon in a metal silicide layer formed thereon. Since silicon agglomeration is a precursor of a polycide inversion phenomenon, polycide inversion which can pierce an underlying oxide and cause device failure is effectively avoided. The increased thermal stability of polycide structures and other structures including a body of polysilicon thus increases the heat budget that can be withstood by the structure and increases the manufacturing process window imposed by the presence of polysilicon which can be exploited in other processes such as annealing to develop a low resistance phase of refractory metal silicide included in the polycide structure, drive-in annealing for formation of source/drain regions of field effect transistors and the like.

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