公开(公告)号：JP2011090671A

公开(公告)日：2011-05-06

申请号：JP2010215193

申请日：2010-09-27

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KAMANU EZE ,  GOODNOW KENNETH JOSEPH ,  EBBERS JOHNATHAN PHILLIP ,  SCHNEIDER KYLE EMIL ,  PETER ALBERT TWOMBLY ,  SUZANNE GRANATO ,  COURCHESNE ADAM JOSEPH

IPC: G06F17/50

CPC classification number: G06F15/7867

Abstract: PROBLEM TO BE SOLVED: To provide a method for maintaining interests of an ASIC (Application Specific Integrated Circuit) process, simplifying supply in a quicker and more general form, providing on-the-fly-customization and creating design.
SOLUTION: A plurality of circuit elements are configured by a first configuration to execute application. According to the method, a computerized device is used to monitor execution of the application in the plurality of circuit elements to generate monitor information and the monitor information is stored to a storage configuration. According to the method, the monitor information is selectively transmitted to external elements independent of the computerized device. The external elements convert the first configuration into a second configuration on the basis of the monitor information. The computerized device receives the second configuration from the external elements and reconfigures a plurality of elements into the second configuration.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种维持ASIC（专用集成电路）流程的兴趣的方法，以更快更通用的形式简化供应，提供即时定制和创建设计。 解决方案：通过第一配置来配置多个电路元件以执行应用。 根据该方法，使用计算机化装置来监视多个电路元件中的应用的执行，以产生监视信息，并将监视信息存储到存储配置中。 根据该方法，监视器信息被选择性地发送到独立于计算机化设备的外部元件。 外部元件基于监视器信息将第一配置转换成第二配置。 计算机化设备从外部元件接收第二配置，并将多个元件重新配置成第二配置。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：GB2320994A

公开(公告)日：1998-07-08

申请号：GB9726216

申请日：1997-12-12

Applicant: IBM

Inventor： GOODNOW KENNETH JOSEPH ,  MICHAIL MICHEL SALIB ,  PRICER WILBUR DAVID ,  VENTRONE SEBASTIAN THEODORE

IPC: H04L1/24 ,  H04L25/34 ,  H04L25/49

Abstract: The invention relates to the use of calibration signals to correct multi-voltage level data signals. A multi-level data signal and a calibration signal representing the maximum possible amplitude of the data signal are sent from a first device 15 to a second device 30 in a network 10. The second device stores the calibration signal in unit 18, compares its amplitude to that of the data signal and corrects the data signal accordingly. Similarly, the calibration unit of the first device stores calibration signals corresponding to the other devices connected to the network and uses the appropriate calibration signal to correct signals received from these devices. Initially, the first device may inquire whether multi-level communication with a second device is possible and if not, revert to binary data signals. In this way, the system is able to automatically handle the transfer of signals to devices which are not multi-level compatible.

公开(公告)号：GB2523870A

公开(公告)日：2015-09-09

申请号：GB201419302

申请日：2014-10-30

Applicant: IBM

Inventor： VENTRONE SEBASTIAN THEODORE ,  GOODNOW KENNETH JOSEPH ,  OGILVIE CLARENCE ROSSER ,  WOODRUFF CHARLES ,  GRAF RICHARD STEPHEN

IPC: H01L25/065 ,  H01L21/768 ,  H01L23/48

Abstract: A heat conductive layer 308 is deposited on a first surface of a wafer of semiconductor chips 332. An insulating layer 312 is then deposited on top of the heat conducting layer. The heat conductive layer is etched to form vias that expose through-electrodes 305 on the first surface of each semiconductor chip. Conductive pads 316 are deposited on the through-electrodes on a second surface of each semiconductor chip. The semiconductor chips are stacked, wherein the conductive bumps of a second one of the semiconductor chips electrically contact the through-electrodes of a first one of the semiconductor chips through the vias of the first semiconductor chip and the conductive bumps of a third one of the semiconductor chips electrically contact the through-electrodes of the second semiconductor chip through the vias of the second semiconductor chip. The holes in the thermally conductive layer and the insulating layer may be formed by etching. The through electrodes may be copper pillars and an underfill may be applied between the bottom semiconductor chip and a substrate.

公开(公告)号：GB2320994B

公开(公告)日：2001-07-11

申请号：GB9726216

申请日：1997-12-12

Applicant: IBM

Inventor： GOODNOW KENNETH JOSEPH ,  MICHAIL MICHEL SALIB ,  PRICER WILBUR DAVID ,  VENTRONE SEBASTIAN THEODORE

IPC: H04L1/24 ,  H04L25/34 ,  H04L25/49

Abstract: A calibrated multi-voltage level system is disclosed having a network of devices, including a first and a second device. The first device comprises a processor for generating data, an encoding unit for encoding the data into a first data signal having multiple voltage levels, and a transmitting unit for transmitting the encoded data signal to the second device. The first device also comprises a calibration unit for sending a first calibration signal to the second device, and for storing a second calibration signal from the second device; and an adaptation unit for correcting the second data signal from the second device with the stored second calibration signal.