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    METHOD AND APPARATUS FOR PROVIDING A RELIABLE PROTOCOL FOR TRANSFERRING DATA
    1.
    发明专利
    METHOD AND APPARATUS FOR PROVIDING A RELIABLE PROTOCOL FOR TRANSFERRING DATA 审中-公开

    公开(公告)号：JP2002305535A

    公开(公告)日：2002-10-18

    申请号：JP2001386626

    申请日：2001-12-19

    Applicant: IBM

    Inventor： FRAZIER GILES ROGER ,  PFISTER GREGORY FRANCIS ,  RECIO RENATO JOHN

    IPC: G06F13/00 ,  G06F15/16 ,  G06F15/17 ,  H04L12/28 ,  H04L12/56 ,  H04L13/08 ,  H04L29/08

    Abstract: PROBLEM TO BE SOLVED: To provide a method, apparatus and computer implemented instructions for transferring data. SOLUTION: A request is sent by a requester to a responder. The request includes the amount of available processing space at the requester. When the request is received from the responder, data are identified using the request. The data are placed into a plurality of subsequences of data packets for transfer to the requester, wherein each packet within the set of subsequences hold data in the amount less than or equal to the amount of available space. These subsequences are then sent to the requester one subsequence at a time. A new subsequence is sent each time the available processing space at the requester becomes free to process data from another subsequence.

    RELIABLE DATAGRAM TRANSPORT SERVICE
    3.
    发明申请
    RELIABLE DATAGRAM TRANSPORT SERVICE 审中-公开
    可靠的DATAGRAM运输服务

    公开(公告)号：WO0072575A3

    公开(公告)日：2001-03-01

    申请号：PCT/US0014222

    申请日：2000-05-24

    Applicant: HEWLETT PACKARD CO ,  IBM ,  COMPAQ COMPUTER CORP ,  ADAPTEC INC ,  GARCIA DAVID J ,  CULLEY PAUL R ,  RECIO RENATO JOHN ,  BENNER ALAN F ,  KRAUSE MICHAEL

    Inventor： GARCIA DAVID J ,  CULLEY PAUL R ,  RECIO RENATO JOHN ,  BENNER ALAN F ,  KRAUSE MICHAEL

    IPC: H04L12/56 ,  G06F9/40 ,  G06F9/46 ,  G06F13/00 ,  G06F15/16 ,  G06F15/163 ,  G06F15/167 ,  G06F15/173 ,  H02H3/05 ,  H04J3/24 ,  H04L5/14 ,  H04N20060101

    CPC classification number: G06F9/544 ,  H04L45/46

    Abstract: A distributed computer sytem (500) includes a source endnode (502) including a source process (508) which produces message data and a send work queue (516a) having work queue elements that describe the message data for sending. A destination endnode (504) includes a destination process (510, 512) and a receive work queue (518b, 520b) having work queue elements that describe where to place incoming message data. A communication fabric (524) provides communication between the source endnode and the destination endnode. An end-to-end context (530, 534) is provided at the source endnode and the destination endnode storing state information to ensure the reception and sequencing of message data sent from the source endnode to the destination endnode permitting reliable datagram service between the source endnode and the destination endnode.

    Abstract translation: 分布式计算机系统（500）包括源端节点（502），源节点（502）包括产生消息数据的源过程（508）和具有描述用于发送的消息数据的工作队列元素的发送工作队列（516a）。 目的地节点（504）包括具有描述入站消息数据的位置的工作队列元素的目的地处理（510,512）和接收工作队列（518b，520b）。 通信结构（524）提供源端节点和目的端节点之间的通信。 源终端上下文（530,534）被提供在源端节点和目的地端节点存储状态信息，以确保从源端节点发送到目的端节点的消息数据的接收和排序，从而允许源之间的可靠数据报服务 endnode和目标endnode。

    5.
    发明专利
    未知

    公开(公告)号：AT314691T

    公开(公告)日：2006-01-15

    申请号：AT03710044

    申请日：2003-04-01

    Applicant: IBM

    Inventor： BEUKEMA BRUCE LEROY ,  GREGG THOMAS ANTHONY ,  NEAL DANNY MARVIN ,  RECIO RENATO JOHN

    IPC: G06F9/54 ,  H04L12/28 ,  H04L12/56 ,  H04L29/06 ,  H04L29/08 ,  G06F13/42 ,  G06F13/40

    Abstract: A method, system, and product in a data processing system are disclosed for managing data transmitted from a first end node to a second end node included in the data processing system. A logical connection is established between the first end node and the second end node prior to transmitting data between the end nodes. An instance number is associated with this particular logical connection. The instance number is included in each packet transmitted between the end nodes while this logical connection remains established. The instance number remains constant during this logical connection. The instance number is altered, such as by incrementing it, each time a logical connection between these end nodes is reestablished. Thus, each packet is associated with a particular instance of the logical connection. When a packet is received, the instance number included in the packet may be used to determine whether the packet is a stale packet transmitted during a previous logical connection between these end nodes.

    8.
    发明专利
    未知

    公开(公告)号：AT331252T

    公开(公告)日：2006-07-15

    申请号：AT02718297

    申请日：2002-03-18

    Applicant: IBM

    Inventor： CRADDOCK DAVID ,  ELKO DAVID ARLEN ,  GREGG THOMAS ANTHONY ,  PFISTER GREGORY FRANCIS ,  RECIO RENATO JOHN

    IPC: H04L12/28 ,  G06F9/445 ,  G06F13/40

    Abstract: A method and system for a distributed computing system having components like end nodes, switches, routers and links interconnecting packets over the interconnecting links. The switches and routers interconnect the end nodes and route the packets to the appropriate end node. The end nodes reassemble the packets into a message at a destination. A mechanism is provided to allow a single physical component to appear as multiple components each with unique control levels. These components may be host channel adapters (HCAs), target channel adapters (TCAs) or switches. A method and system for end node partitioning for a physical element is provided. A configuration of the physical element is selected. A port associated with the physical element is probed, wherein the port is probed with a subnet management packet by a subnet manager. In response to detecting a switch associated with the port, a local identifier is assigned to the port resulting in a configuration change of the physical element.

    SYSTEM INPUT/OUTPUT INTERFACE DESIGN FOR SCALING.
    10.
    发明专利
    SYSTEM INPUT/OUTPUT INTERFACE DESIGN FOR SCALING. 未知

    公开(公告)号：MY122111A

    公开(公告)日：2006-03-31

    申请号：MYPI9803080

    申请日：1998-07-07

    Applicant: IBM

    Inventor： BEUKEMA BRUCE LEROY ,  BUCKLAND PATRICK ALLEN ,  CHEN WEN-TZER THOMAS ,  ELKO DAVID ARLEN ,  JUDD IAN DAVID ,  RECIO RENATO JOHN

    IPC: G06F13/28 ,  G06F3/00 ,  G06F9/06 ,  G06F12/08

    Abstract: THE SYSTEM I/O INTERFACE (24) AND ITS DATA STRUCTURE (26) ARE DESIGNED TO MINIMIZE THE HOST CPU UTILIZATION IN DRIVING AN ADAPTER (18, 20). THE INTERFACE IS ALSO DESIGNED TO REDUCE THE SYSTEM INTERFERENCE IN PROCESSING I/O REQUESTS. TO ELIMINATE THE NEED OF USING PIO INSTRUCTIONS, THE COMMAND/STATUS BLOCKS FOR EXCHANGING MESSAGES BETWEEN THE SYSTEM (10) AND THE ADAPTER RESIDE IN THE SYSTEM MEMORY (14). THE DATA STRUCTURE IS DESIGNED TO AVOID "SHARE WRITE" ENTRIES IN ORDER TO FURTHER MINIMIZE THE OVERHEAD OF MAINTAINING EACH COHERENCY WHEN UPDATING AN ENTRY IN THE CACHE EITHER CONCURRENTLY OR SEQUENTIALLY BY BOTH ADAPTER AND SYSTEM CPU (12). FURTHER, THE DATA STRUCTURE OF THE CONTROL AND STATUS BLOCKS IS RESIDED IN THE SYSTEM MEMORY. THE SYSTEM CPU USES STORE INSTRUCTION TO PREPARE CONTROL BLOCKS AND LOAD INSTRUCTION TO READ FROM COMPLETION STATUS BLOCKS; WHILE THE ADAPTER WILL RELY ON ITS DMA ENGINE TO MOVE DATA TO/FROM SYSTEM MEMORY IN ACCESSING CONTROL/STATUS BLOCKS.(FIG. 1)

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