公开(公告)号：DE69502656D1

公开(公告)日：1998-07-02

申请号：DE69502656

申请日：1995-03-08

Applicant: IBM

Inventor： PAULSON PEDER JAMES ,  BLACKMON HERMAN LEE ,  HASELHORST KENT HAROLD ,  DREHMEL ROBERT ALLEN ,  KROLAK DAVID JOHN ,  GROSBACH LYLE EDWIN ,  MARCELLA JAMES ANTHONY

IPC: G06F13/42 ,  G06F13/40

Abstract: A shared bus non-sequential data ordering method and apparatus are provided. A maximum bus width value and a minimum transfer value are identified. A minimum number of sub-transfers is identified responsive to the identified maximum bus width value and the minimum transfer value. A bus unit having a maximum number of chips to receive and/or send data receives data in a predefined order during multiple sub-transfers. During each data sub-transfer, a corresponding predefined word is transferred to each chip of the bus unit.

公开(公告)号：AT166733T

公开(公告)日：1998-06-15

申请号：AT95480019

申请日：1995-03-08

Applicant: IBM

Inventor： PAULSON PEDER JAMES ,  BLACKMON HERMAN LEE ,  HASELHORST KENT HAROLD ,  DREHMEL ROBERT ALLEN ,  KROLAK DAVID JOHN ,  GROSBACH LYLE EDWIN ,  MARCELLA JAMES ANTHONY

IPC: G06F13/42 ,  G06F13/40

Abstract: A shared bus non-sequential data ordering method and apparatus are provided. A maximum bus width value and a minimum transfer value are identified. A minimum number of sub-transfers is identified responsive to the identified maximum bus width value and the minimum transfer value. A bus unit having a maximum number of chips to receive and/or send data receives data in a predefined order during multiple sub-transfers. During each data sub-transfer, a corresponding predefined word is transferred to each chip of the bus unit.