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    2.
    发明专利
    未知

    公开(公告)号：DE3688580D1

    公开(公告)日：1993-07-22

    申请号：DE3688580

    申请日：1986-09-23

    Applicant: IBM

    Inventor： YOFFA ELLEN JUNE ,  HAUGE PETER SWIFT

    IPC: H01L21/8234 ,  G06F17/50 ,  H01L21/3205 ,  H01L21/82 ,  H01L21/822 ,  H01L23/52 ,  H01L27/04 ,  H01L27/088 ,  H03K19/173 ,  G06F15/60

    Abstract: A method for increasing the wirability of complementary metal oxide semiconductor (CMOS) differential cascode voltage switch (DCVS) logic circuits which comprises designing the circuitry to permit as many of the internal tree connections as possible to be wired using diffusion techniques. The method utilizes differential pair and load microblocks which have been designed so as to allow mirroring on a vertical centre line. Utilizing the availability of mirroring for individual pairs plus relocation of individual pairs in the logic tree the crossings may be largely eliminated in a shortened period. It utilizes a step by step row and column analysis of the initial or starting tree design resulting from the basic Boolean logic to be performed by the particular circuit and makes required load mirroring and differential pair relocation decisions in an iterative process.

    4.
    发明专利
    未知

    公开(公告)号：DE3688580T2

    公开(公告)日：1993-12-23

    申请号：DE3688580

    申请日：1986-09-23

    Applicant: IBM

    Inventor： YOFFA ELLEN JUNE ,  HAUGE PETER SWIFT

    IPC: H01L21/8234 ,  G06F17/50 ,  H01L21/3205 ,  H01L21/82 ,  H01L21/822 ,  H01L23/52 ,  H01L27/04 ,  H01L27/088 ,  H03K19/173 ,  G06F15/60

    Abstract: A method for increasing the wirability of complementary metal oxide semiconductor (CMOS) differential cascode voltage switch (DCVS) logic circuits which comprises designing the circuitry to permit as many of the internal tree connections as possible to be wired using diffusion techniques. The method utilizes differential pair and load microblocks which have been designed so as to allow mirroring on a vertical centre line. Utilizing the availability of mirroring for individual pairs plus relocation of individual pairs in the logic tree the crossings may be largely eliminated in a shortened period. It utilizes a step by step row and column analysis of the initial or starting tree design resulting from the basic Boolean logic to be performed by the particular circuit and makes required load mirroring and differential pair relocation decisions in an iterative process.

    5.
    发明专利
    未知

    公开(公告)号：DE2430521A1

    公开(公告)日：1975-01-23

    申请号：DE2430521

    申请日：1974-06-25

    Applicant: IBM

    Inventor： DILL FREDERICK HAYES ,  HAUGE PETER SWIFT

    IPC: G01J4/04 ,  G01B11/06 ,  G01B11/27 ,  G01N21/21 ,  G02B5/30 ,  G01N21/00

    Abstract: An automatic ellipsometer is disclosed which comprises a mechanical-optical, an electrical, and a digital (computer) component. The mechanical-optical component includes a light source, various polarizing elements (one of which spins continuously), necessary apertures, and a light detector. The electrical component includes a signal from the light detector, trigger pulses from an angular shaft encoder, and an analog-digital converter, and produces a string of digitized data in a form which can be read and analyzed by digital logical circuitry. The digital (computer) component comprises logic circuitry in sufficient quantity to store and execute a relatively simple data analysis program, there being suitably associated with the digital component, one or more print-out and/or display devices. To facilitate automation of ellipsometric operation, there is provided a sample alignment system which includes a spot-defining aperture in the incident light beam, a sample holder with capability for rotation about two perpendicular axes intersecting at the intersection of the axis of the light beam source and the axis of the detector, and a four-quadrant beam deviation detector located a convenient distance from the sample along the detector axis. In the operation of the system, the sample is properly oriented about two axes of rotation, and data in the form of light intensity transmitted through a continuously spinning analyzer in the reflected beam path is sampled at convenient angular intervals to provide data which is digitally coded, and the data then is numerically Fourier analyzed to enable extrapolated properties of the sample to be displayed or typed out. The entire sequence of operations, i.e., from sample insertion to type out or display is on the order of about 5-10 seconds.

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