中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

6 records (took 0.017 seconds)

    Testing of nonlinear circuits by comparison with a reference simulation with means to eliminate errors caused by critical race conditions
    1.
    发明授权
    Testing of nonlinear circuits by comparison with a reference simulation with means to eliminate errors caused by critical race conditions 失效
    通过对比模拟测试非线性电路的方法，以消除由关键条件引起的错误

    公开(公告)号：US3633100A

    公开(公告)日：1972-01-04

    申请号：US3633100D

    申请日：1970-05-12

    Applicant: IBM

    Inventor： HEILWEIL MELVIN F ,  MCMABON MAURICE T JR

    IPC: G01R31/3193 ,  G06F11/26 ,  G01R15/12

    CPC classification number: G01R31/3193 ,  G01R31/31937 ,  G06F11/261

    Abstract: A method and apparatus for testing complex nonlinear binary circuits by applying a bilevel signal pattern, particularly a random pattern, to both a plurality of inputs in the circuit being tested and to a corresponding plurality of inputs in a reference simulation of said circuit, and for comparing corresponding outputs from the circuit and the simulation. The apparatus includes means for converting the signal pattern which is to be applied to the simulation to a three level signal pattern in which two levels represent the two levels in the bilevel pattern and the third level represents an indeterminate binary circuit state. The reference simulation is adapted to receive a three level pattern input and to provide a three level output. Means for applying the three level signal pattern to the reference simulation include means for applying a third level signal to a given simulation input during a change between first and second level signals being applied to said input. Sensing means determine which portion of the simulation output remains at the third level, particularly after a change between any of the first two levels at one or more of the simulation inputs; the existence of the third or indeterminate level indicates that the change produced race conditions critical to the portion of the output at the indeterminate level. Inhibiting means prevent that portion of the simulation output at the indeterminate level from being compared with the output of the circuit being tested. This presents an improper rejection of a good circuit because of ''''compare failure'''' caused by the critical race conditions.

    Abstract translation: 一种用于通过将被测电路中的多个输入端应用二进制信号模式（特别是随机模式）并将其应用于所述电路的参考模拟中的相应多个输入来测试复数非线性二进制电路的方法和装置， 比较电路的相应输出和仿真。

Patent Agency Ranking