公开(公告)号：JPH04197663A

公开(公告)日：1992-07-17

申请号：JP32135690

申请日：1990-11-27

Applicant: IBM

Inventor： ICHIOKA ZENICHI ,  KATO HIROFUMI ,  OMICHI KOJI

IPC: B41J2/51 ,  B41J2/255 ,  B41J2/30

Abstract: PURPOSE: To avoid simultaneous urging of two printing elements arranged along a printing direction by providing a data allocating means for allocating two print data isolated at an interval corresponding to that of the two elements along the direction to only one element. CONSTITUTION: At the time of printing by using an A printing wire row in which printing wires A on two adjacent liens along a printing direction are deviated by an even dot amount and a B printing wire row in which printing wires B are disposed by dividing into the same integer dots along the wires A of the A printing wire row and the printing direction, valid data array is obtained by alternately distributing two data to the A and B rows to distribute it to the same rows at the same positions of the direction of a plurality of lines L1, L2, L3,... along the direction. Such a data distribution can be realized by providing circuits at the lines L1, L2, L3,... and setting D-FFs 60, 62 to the same initial states.

公开(公告)号：JPH075408A

公开(公告)日：1995-01-10

申请号：JP2387394

申请日：1994-02-22

Applicant: IBM

Inventor： ICHIOKA ZENICHI ,  RESURII CHIYAARUSU JIENKINSU ,  KIMURA SHINICHI ,  ROBAATO JIYON PORASUTORU ,  RONARUDO ROI TORAUTOMAN ,  ROBAATO RUUKU UIZUNIFU

IPC: G01R31/02 ,  G02F1/13 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/00

Abstract: PURPOSE: To provide a method for specifying the type of the defect of a TFT/ LCD array. CONSTITUTION: In a TFT/LCD, a driving pulse is impressed to the end part to be driven of a gate line 24, it is confirmed that the gate line is not disconnected, that is, it is continuous by observing the presence of a corresponding characteristic pulse on a first data line 20 close to the driven end part of this gate line and the presence of the corresponding characteristic pulse on a second data line passing through the opposite end part to this driven end part. In the same way, the gate lines are successively tested, the continuous gate lines at the uppermost side and the continuous gate lines at the lowermost side are found on a display panel, and the completeness of all data lines is evaluated by using those continuous gate lines at the uppermost and lowermost sides. Thus, this TFT/LCD array can be tested.

公开(公告)号：JPH06148688A

公开(公告)日：1994-05-27

申请号：JP1293293

申请日：1993-01-28

Applicant: TOSHIBA CORP ,  IBM

Inventor： OGAWA MEIKO ,  KITAHARA HIROAKI ,  KIMURA SHINICHI ,  ICHIOKA ZENICHI ,  SUZUKI KOHEI

IPC: G02F1/136 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/78 ,  H01L29/786 ,  H01L29/784

Abstract: PURPOSE: To prevent the discontinuity defect and the shorting defect of shorting lines and thin film transistors by connecting the shorting line formed along an outer periphery beyond a display area on an insulating substrate within a resistance area constituted of the thin film transistors. CONSTITUTION: Plural address wirings 2 and data wirings 3 are formed on the display area on the insulating substrate 1. The source electrodes 4C of the thin film transistors(TFT) 4 formed at respective crossing points are connected to picture element electrodes 5. The address wirings 2 and the data wirings 3 extend beyond the display area and they are connected to driving pulse input pads 8 and 9 and a resistor 10, TFT 11 and 12 constituting the resistors 10 are connected to the shorting lines 13 which mutually short all the resistors 10. The shorting lines 13 are formed in a ladder form along the outer periphery on the insulating substrate 1. When the address wirings 2 are charged by static electricity, current flows between the shorting lines 13 through the resistors 10 in a direction where the charge is compensated. Thus, voltage generated between the address wirings 2 and the data-wirings 3 can be suppressed.