公开(公告)号：GB2597430B

公开(公告)日：2022-06-15

申请号：GB202116996

申请日：2020-04-28

Applicant: IBM

Inventor： PRAVEEN JOSEPH ,  TAO LI ,  INDIRA SESHADRI ,  EKMINI ANUJA DE SILVA

IPC: H01L21/8234 ,  H01L29/786

Abstract: Semiconductor devices and methods of forming the same include forming a first dielectric layer around a semiconductor fin, formed from a first dielectric material, to a target height lower than a height of the semiconductor fin. A second dielectric layer is deposited on the first dielectric layer and is formed from a second dielectric material. A third dielectric layer, formed from the first dielectric material, is formed on the second dielectric layer. The second dielectric layer is etched away to expose a gap on the semiconductor fin. A portion of the semiconductor fin that is exposed in the gap is oxidized to form an isolation layer.

公开(公告)号：GB2579525A

公开(公告)日：2020-06-24

申请号：GB202002832

申请日：2018-09-25

Applicant: IBM

Inventor： INDIRA SESHADRI ,  EKMINI ANUJA DE SILVA ,  CHI-CHUN LIU ,  CHENG CHI ,  JING GUO ,  LUCIANA MELI THOMPSON

IPC: G03F7/00

Abstract: Embodiments of the present invention provide systems and methods for trapping amines. This in turn mitigates the undesired scumming and footing effects in a photoresist. The polymer brush is grafted onto a silicon nitride surface. The functional groups and molecular weight of the polymer brush provide protons and impose steric hindrance, respectively, to trap amines diffusing from a silicon nitride surface.

公开(公告)号：GB2597430A

公开(公告)日：2022-01-26

申请号：GB202116996

申请日：2020-04-28

Applicant: IBM

Inventor： PRAVEEN JOSEPH ,  TAO LI ,  INDIRA SESHADRI ,  EKMINI ANUJA DE SILVA

IPC: H01L21/8234 ,  H01L29/786

Abstract: Semiconductor devices and methods of forming the same include forming a first dielectric layer around a semiconductor fin, formed from a first dielectric material, to a target height lower than a height of the semiconductor fin. A second dielectric layer is deposited on the first dielectric layer and is formed from a second dielectric material. A third dielectric layer, formed from the first dielectric material, is formed on the second dielectric layer. The second dielectric layer is etched away to expose a gap on the semiconductor fin. A portion of the semiconductor fin that is exposed in the gap is oxidized to form an isolation layer.

公开(公告)号：IL295107A

公开(公告)日：2022-09-01

申请号：IL29510722

申请日：2022-07-26

Applicant: IBM ,  TSUNG SHENG KANG ,  ARDASHEIR RAHMAN ,  PRAVEEN JOSEPH ,  INDIRA SESHADRI ,  EKMINI ANUJA DE SILVA ,  TAO LI

Inventor： TSUNG-SHENG KANG ,  ARDASHEIR RAHMAN ,  PRAVEEN JOSEPH ,  INDIRA SESHADRI ,  EKMINI ANUJA DE SILVA ,  TAO LI

IPC: B82Y10/00 ,  H01L21/02 ,  H01L21/311 ,  H01L21/822 ,  H01L21/8238 ,  H01L27/06 ,  H01L27/092 ,  H01L27/12 ,  H01L29/06 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

Abstract: A method includes forming a first semiconducting channel comprising a plurality of vertical nanowires and a second semiconducting channel comprising a plurality of vertical nanowires. The first semiconducting channel and the second semiconducting channel are formed in a stacked configuration. The plurality of vertical nanowires of the first semiconducting channel are formed in alternating positions relative to the plurality of vertical nanowires of the second semiconducting channel.