-
公开(公告)号:EP1378090A4
公开(公告)日:2005-02-09
申请号:EP02723233
申请日:2002-02-25
Applicant: IBM
Inventor: BARRETT WAYNE M , CHEN DONG , COTEUS PAUL W , GARA ALAN G , JACKSON RORY D , KOPCSAY GERARD V , NATHANSON BEN J , TAKKEN TODD E , VRANAS PAVLOS M
IPC: G06F11/10 , G06F9/46 , G06F9/52 , G06F11/00 , G06F11/20 , G06F12/00 , G06F12/02 , G06F12/08 , G06F12/10 , G06F13/00 , G06F13/24 , G06F13/38 , G06F15/173 , G06F15/177 , G06F15/80 , G06F17/14 , H04L1/00 , H04L7/02 , H04L7/033 , H04L12/28 , H04L12/56 , H04L25/02 , H05K7/20 , H04L7/00 , H03D3/24 , H04B10/08
CPC classification number: H05K7/20836 , F24F11/77 , G06F9/52 , G06F9/526 , G06F15/17381 , G06F17/142 , G09G5/008 , H04L7/0338 , Y02B30/746
Abstract: A fan module including: two or more individual fans, each fan having an air movement means and a motor engaged with the air movement means for accelerating air entering each of the two or more individual fans; a temperature sensor for sensing a temperature associated with the two or more fans and for outputting a first signal corresponding to the temperature; rotational speed sensor for outputting a second signal corresponding to a rotational speed of each of the two or more fans; and a processor for receiving the first and second signals and controlling the two or more individual fans based on the first and second signals.
-
公开(公告)号:JP2004103015A
公开(公告)日:2004-04-02
申请号:JP2003305349
申请日:2003-08-28
Applicant: Internatl Business Mach Corp
, インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Inventor: KELLER ALEXANDER , BLUMENTHAL URI , JACKSON RORY D , KAR GAUTAM
CPC classification number: H04L41/0893 , G06F11/008 , G06Q10/00 , Y10S707/99953
Abstract: PROBLEM TO BE SOLVED: To provide a technique for managing dependency information among various components of a computing environment. SOLUTION: Information associated with components of the computing environment is acquired. Then, from at least a portion of the acquired information, a determination is made as to the existence of one or more relationships associated with at least a portion of the components of the computing environment. The determination of the existence of one or more relationships is capable of accounting for a full lifecycle (e.g., deployment, installation and runtime) associated with at least one component of the computing environment. Thus, the technique for managing runtime dependency among the various components of computing systems is disclosed to provide a level of abstraction from individual systems and to allow the computation of dependency of service/component related to end-to-end service, as perceived by a customer. COPYRIGHT: (C)2004,JPO
-
公开(公告)号:CA2436412A1
公开(公告)日:2002-09-06
申请号:CA2436412
申请日:2002-02-25
Applicant: IBM
Inventor: GARA ALAN G , COTEUS PAUL W , JACKSON RORY D , KOPCSAY GERARD V , VRANAS PAVLOS M , TAKKEN TODD E , NATHANSON BEN J , BARRETT WAYNE M , CHEN DONG
IPC: G06F11/10 , G06F9/46 , G06F9/52 , G06F11/00 , G06F11/20 , G06F12/00 , G06F12/02 , G06F12/08 , G06F12/10 , G06F13/00 , G06F13/24 , G06F13/38 , G06F15/173 , G06F15/177 , G06F15/80 , G06F17/14 , H04L1/00 , H04L7/02 , H04L7/033 , H04L12/28 , H04L12/56 , H04L25/02 , H05K7/20 , H04L7/00 , H04B10/08 , H03D3/24
Abstract: A data capture technique for high speed signaling to allow for optimal sampling of an asynchronous data stream. This technique allows for extremely high data rates and does not require that a clock be sent with the data as i s done in source synchronous systems. The present invention also provides a hardware mechanism for automatically adjusting transmission delays (Fig. 5) for optimal two-bit simultaneous bi-directional (SiBiDi) signaling.
-
公开(公告)号:FR2356999A1
公开(公告)日:1978-01-27
申请号:FR7716059
申请日:1977-05-18
Applicant: IBM
Inventor: JACKSON RORY D , RACKL WILLI K
Abstract: When a data stream includes long sections of data that are repeated periodically, storage space may be saved by not including full repetitions of such sections in the storage. However, when the data is to be read from storage for utilization, the omitted repetitious sections must be inserted. This is accomplished by providing hardware apparatus which recognizes a particular flag occurring in the stored data. After recognizing the flag, the expansion apparatus interprets the next piece of information in the data stream as being the storage address of the start of a section of data that is to be inserted into the data stream; the next piece of information is interpreted as being the length of the section of data to be inserted; and the next following piece of information is the number of times that the section of data is to be inserted. The apparatus will respond to the flag and its associated indicators by inserting the appropriate data section the indicated number of times.
-
公开(公告)号:DE60221235T2
公开(公告)日:2008-04-10
申请号:DE60221235
申请日:2002-02-25
Applicant: IBM
Inventor: BARRETT WAYNE M , CHEN DONG , COTEUS PAUL W , GARA ALAN G , JACKSON RORY D , KOPCSAY GERARD V , NATHANSON BEN J , TAKKEN TODD E , VRANAS PAVLOS M
IPC: G06F11/10 , H04L7/00 , G06F9/46 , G06F9/52 , G06F11/00 , G06F11/20 , G06F12/00 , G06F12/02 , G06F12/08 , G06F12/10 , G06F13/00 , G06F13/24 , G06F13/38 , G06F15/173 , G06F15/177 , G06F15/80 , G06F17/14 , H03D3/24 , H04B10/08 , H04L1/00 , H04L7/02 , H04L7/033 , H04L12/28 , H04L12/56 , H04L25/02 , H05K7/20
Abstract: A data capture technique for high speed signaling to allow for optimal sampling of an asynchronous data stream. This technique allows for extremely high data rates and does not require that a clock be sent with the data as is done in source synchronous systems. The present invention also provides a hardware mechanism for automatically adjusting transmission delays for optimal two-bit simultaneous bi-directional (SiBiDi) signaling.
-
公开(公告)号:DE60221235D1
公开(公告)日:2007-08-30
申请号:DE60221235
申请日:2002-02-25
Applicant: IBM
Inventor: BARRETT WAYNE M , CHEN DONG , COTEUS PAUL W , GARA ALAN G , JACKSON RORY D , KOPCSAY GERARD V , NATHANSON BEN J , TAKKEN TODD E , VRANAS PAVLOS M
IPC: G06F11/10 , H04L7/00 , G06F9/46 , G06F9/52 , G06F11/00 , G06F11/20 , G06F12/00 , G06F12/02 , G06F12/08 , G06F12/10 , G06F13/00 , G06F13/24 , G06F13/38 , G06F15/173 , G06F15/177 , G06F15/80 , G06F17/14 , H03D3/24 , H04B10/08 , H04L1/00 , H04L7/02 , H04L7/033 , H04L12/28 , H04L12/56 , H04L25/02 , H05K7/20
Abstract: A data capture technique for high speed signaling to allow for optimal sampling of an asynchronous data stream. This technique allows for extremely high data rates and does not require that a clock be sent with the data as is done in source synchronous systems. The present invention also provides a hardware mechanism for automatically adjusting transmission delays for optimal two-bit simultaneous bi-directional (SiBiDi) signaling.
-
公开(公告)号:CA1074016A
公开(公告)日:1980-03-18
申请号:CA280453
申请日:1977-06-13
Applicant: IBM
Inventor: JACKSON RORY D , RACKL WILLI K
Abstract: DATA EXPANSION APPARATUS of The Disclosure When a data stream includes long sections of data that are repeated periodically, storage space may be saved by not including full repetitions of such sections in the storage. However, when the data is to be read from storage for utilization, the omitted repetitious sections must be inserted. This is accomplished by providing hardware apparatus which recognizes a particular flag occurring in the stored data. After recognizing the flag, the expansion apparatus interprets the next piece of information in the data stream as being the storage address of the start of a section of data that is to be inserted into the data stream; the next piece of information is interpreted as being the length of the section of data to be inserted; and the next following piece of information is the number of times that the section of data is to be inserted. The apparatus will respond to the flag and its associated indicators by inserting the appropriate data section the indicated number of times.
-
-
-
-
-
-