公开(公告)号：JPH0920942A

公开(公告)日：1997-01-21

申请号：JP16489596

申请日：1996-06-25

Applicant: IBM

Inventor： PANAYOTEISU KONSUTANTEINU ANDO ,  HARIKURIA DERIJIYANNI ,  JIEEMUZU MATSUKERU EDOUIN HAAP ,  CHIYAO KUN FUU ,  DEIRU JIYONASAN PIASON ,  SUKOTSUTO KEBUIN REINORUZU ,  KIN NIN TOUU ,  SHIPURIAN EMEKA UZOFU

IPC: C22C9/00 ,  C22C9/02 ,  H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H01L23/532

Abstract: Copper alloys containing between 0.01 and 10 weight percent of at least one alloying element selected from carbon, indium and tin for improved electromigration resistance, low resistivity and good corrosion resistance that can be used in chip and package interconnections and a method of making such interconnections and conductors by first forming the copper alloy and then annealing it to cause the diffusion of the alloying element toward the grain boundaries between the grains in the alloy are disclosed.

公开(公告)号：JPS6119039A

公开(公告)日：1986-01-27

申请号：JP3065185

申请日：1985-02-20

Applicant: Ibm

Inventor： JIEROOMU JIYON KUOMO ,  JIEEMUZU MATSUKERU EDOUIN HAAP ,  HARORUDO RICHIYAADO KAAFUMAN ,  JIEEMUZU RUISU SUPAIDERU

IPC: H01J37/08 ,  B23K15/00 ,  C23C14/46 ,  H01J37/09 ,  H01J37/30 ,  H01J37/305 ,  H01J37/317 ,  H01L21/265

CPC classification number: C23C14/46 ,  H01J37/09 ,  H01J37/3053 ,  H01J37/3178

公开(公告)号：JPS57113548A

公开(公告)日：1982-07-15

申请号：JP16654981

申请日：1981-10-20

Applicant: IBM

Inventor： JIEROOMU JIYON KUOMO ,  JIEEMUZU MATSUKERU EDOUIN HAAP

IPC: H01J37/08 ,  C23C14/32 ,  H01J37/147 ,  H01J37/30 ,  H01J37/305 ,  H01J37/317 ,  H01L21/302

公开(公告)号：JPH04336450A

公开(公告)日：1992-11-24

申请号：JP29109591

申请日：1991-11-07

Applicant: IBM

Inventor： FURANSOA DOUURURU ,  JIEEMUZU MATSUKERU EDOUIN HAAP ,  JIYON RESUTAA MOOAA ZA FUOOSU

IPC: H01L21/28 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/321 ,  H01L21/768

Abstract: PURPOSE: To provide a method for filling a metal of a low resistivity at a temperature not more than 400 deg.C into a via of a high aspect ratio in a VLSI mutual connection structure. CONSTITUTION: The low fusing-point alloy of a desirable low-resistance rate metal and an alloy element is deposited in a via 32 of high aspect ratio and is formed up to a surface layer 24. The deposited alloy is diffused into the surface layer 24, by refining it by a low-temperature oxidation process at that place. Then, a metallic plug 32 of the low resistivity rate is left in the via 32 in the mutual connecting structure by removing the surface layer.

公开(公告)号：JPS583238A

公开(公告)日：1983-01-10

申请号：JP1651982

申请日：1982-02-05

Applicant: IBM

Inventor： KAATO RUDORUFU GURIIBU ,  JIEEMUZU MATSUKERU EDOUIN HAAP

IPC: H05K3/34 ,  B23K1/005 ,  B23K1/20 ,  B23K17/00 ,  C23G5/00 ,  H01L21/48 ,  H01L21/52 ,  H01L21/60

公开(公告)号：JPH07169711A

公开(公告)日：1995-07-04

申请号：JP25678794

申请日：1994-10-21

Applicant: IBM

Inventor： SHIRERU KIYABURARU JIYUNIA ,  ROORENSU ARUFURETSUDO KUREBUEN ,  FURANSOWA MATSUKUSU DEYURURU ,  JIEEMUZU MATSUKERU EDOUIN HAAP ,  RANDEII UIRIAMU MAN ,  GUREN RESUTAA MAIRUZU ,  DONARUDO UORUTAA DAGURASU RAKO

IPC: C23C20/02 ,  C30B1/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336

Abstract: PURPOSE: To omit a phase transition annealing process by providing a fire-proof metal on, while being-adjacent to the surface of a silicon layer, sticking the metal which is to be used for forming a metal silicide alter as a layer such as to coat a fire-proof metal layer, and heating a wafer to a sufficiently high temperature to form a metal silicide using the metal. CONSTITUTION: A fire-proof metal is provided on a silicon surface by vapor- deposition using a metal pellet, etc. A titanium silicide layer is formed so as to cover a silicon layer on a semiconductor. A fire-proof metal is provided adjacent on the surface of the silicon layer, and a titanium layer is stuck so as to cover the fire-proof metal. Then, a wafer is heated to a temperature sufficient for at least partially forming, a titanium silicide from the titanium layer.

公开(公告)号：JPS5797688A

公开(公告)日：1982-06-17

申请号：JP14408581

申请日：1981-09-14

Applicant: IBM

Inventor： JIEROOMU JIYON KUOMO ,  JIEEMUZU MATSUKERU EDOUIN HAAP

IPC: C23F4/00 ,  C23C14/48 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/316 ,  H01L39/24 ,  H01L49/00

公开(公告)号：JPS569956A

公开(公告)日：1981-01-31

申请号：JP8297980

申请日：1980-06-20

Applicant: IBM

Inventor： JII BUI CHIYANDORASHIEEKAA ,  PURABUIIN CHIYAUDARI ,  JIEROOMU JIYON KUOMO ,  RICHIYAADO JIYOSEFU GIYANBINO ,  JIEEMUZU MATSUKERU EDOUIN HAAP

IPC: B23K15/00 ,  H01J3/04 ,  H01J27/02 ,  H01J27/20 ,  H01J37/08 ,  H01L21/265 ,  H01L27/00

公开(公告)号：JPH07307302A

公开(公告)日：1995-11-21

申请号：JP9711195

申请日：1995-04-21

Applicant: IBM

Inventor： SHIRIRU KABURARU JIYUNIA ,  KEBUIN KOKU CHIYAN ,  JIYATSUKU ON CHIYUU ,  JIEEMUZU MATSUKERU EDOUIN HAAP

IPC: C30B29/06 ,  C23C14/08 ,  C23C16/04 ,  H01L21/20 ,  H01L21/203 ,  H01L21/205

Abstract: PURPOSE: To grow the epitaxial layer of silicon or silicon alloy selectively on a semiconductor substrate at relatively low temperature, by growing the epitaxial layer on the substrate after forming the mask layer of the oxide of a specified element. CONSTITUTION: The film mask 11 of the oxide of an element being selected from the group of scandium, yttrium, lanthanum, cerium, praseodymium, neodymium, samarium, europium, cadmium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, and lutetium is made on a wafer 10. The adhesion of the oxide is performed by sputtering. Next, an epitaxial layer 12 of silicon or the like is grown on the wafer 10, using the patterned oxide mask layer 11. At that time, the epitaxial layer 12 is grown on the wafer 10 at a temperature lower than 650 deg.C, but it is not grown on the mask layer 11.

公开(公告)号：JPS58206037A

公开(公告)日：1983-12-01

申请号：JP4248983

申请日：1983-03-16

Applicant: Ibm

Inventor： JIEROOMU JIYON KUOMO ,  JIEEMUZU MATSUKERU EDOUIN HAAP ,  HARORUDO RICHIYAADO KAUFUMAN

IPC: H01J37/22 ,  C23C14/46 ,  C23F1/00 ,  C23F4/00 ,  H01J27/02 ,  H01J27/08 ,  H01J27/14 ,  H01J37/08 ,  H01L21/265

CPC classification number: H01J27/022 ,  H01J27/14 ,  H01J37/08