公开(公告)号：KR20100118508A

公开(公告)日：2010-11-05

申请号：KR20100025459

申请日：2010-03-22

Applicant: IBM

Inventor： JOHNSON CHARLES LUTHER ,  VANDERWIEL STEVEN PAUL ,  HOOVER RUSSELL DEAN ,  VAREKAMP PATRICK RONALD ,  BARTLEY GERALD K

IPC: H01L23/12 ,  H01L21/3205 ,  H01L21/768

CPC classification number: G06F17/5068 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01087 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: PURPOSE: An interlayer interconnection for a multilayer semiconductor stack is provided to easily perform a communication between functional units using a universal and standardized interlayer bus. CONSTITUTION: Contact pads(22) are arranged on the surface of a semiconductor die(12). A gray pad(24) is interposed in an interlayer interface region(18). The gray pad is combined with a conductor for an interlayer bus. A black pad(26) is combined with a positive voltage or a ground. A white pad is electrically separated from an active circuit.

Abstract translation: 目的：提供用于多层半导体堆叠的层间互连，以便容易地使用通用和标准化的层间总线执行功能单元之间的通信。 构成：在半导体管芯（12）的表面上配置接触焊盘（22）。 灰色衬垫（24）插入在层间界面区域（18）中。 灰色垫与用于层间总线的导体组合。 黑底（26）与正电压或地相组合。 白底板与有源电路电隔离。

公开(公告)号：DE68910243D1

公开(公告)日：1993-12-02

申请号：DE68910243

申请日：1989-07-12

Applicant: IBM

Inventor： COX DENNIS THOMAS ,  GUERTIN DAVID LEROY ,  JOHNSON CHARLES LUTHER ,  RUDOLPH BRUCE GEORGE ,  TURNER MARK ELLIOT ,  WILLIAMS ROBERT RUSSELL

IPC: G01R31/28 ,  G01R29/02 ,  G01R31/30 ,  G06F11/22 ,  G11C29/00 ,  G11C29/02 ,  G11C29/56 ,  H01L21/822 ,  H01L27/04 ,  H03K19/003

Abstract: A performance-sensing element (PSE) circuit (300) detects the actual speed of other circuits on the same chip (200) by launching a pulse into a tapped cascade of circuits on the chip, then detecting how far the pulse has progressed after a known interval. Control signals indicating circuit speed can stabilize parameters of the other circuits, such as rate of change of current (di/dt) in driver circuits, absolute delay of clock signals from one chip to another, and relative delay of multiple clock signals within the chip.

公开(公告)号：DE68910243T2

公开(公告)日：1994-05-05

申请号：DE68910243

申请日：1989-07-12

Applicant: IBM

Inventor： COX DENNIS THOMAS ,  GUERTIN DAVID LEROY ,  JOHNSON CHARLES LUTHER ,  RUDOLPH BRUCE GEORGE ,  TURNER MARK ELLIOT ,  WILLIAMS ROBERT RUSSELL

IPC: G01R31/28 ,  G01R29/02 ,  G01R31/30 ,  G06F11/22 ,  G11C29/00 ,  G11C29/02 ,  G11C29/56 ,  H01L21/822 ,  H01L27/04 ,  H03K19/003

Abstract: A performance-sensing element (PSE) circuit (300) detects the actual speed of other circuits on the same chip (200) by launching a pulse into a tapped cascade of circuits on the chip, then detecting how far the pulse has progressed after a known interval. Control signals indicating circuit speed can stabilize parameters of the other circuits, such as rate of change of current (di/dt) in driver circuits, absolute delay of clock signals from one chip to another, and relative delay of multiple clock signals within the chip.

公开(公告)号：DE3377959D1

公开(公告)日：1988-10-13

申请号：DE3377959

申请日：1983-10-21

Applicant: IBM

Inventor： JOHNSON CHARLES LUTHER ,  RYBA JOHN MICHAEL

IPC: H01L23/52 ,  H01L21/60 ,  H01L23/498 ,  H01L23/48

Abstract: An IC chip connected to a substrate (10) by a pattern of pads (12) arranged in single lines along the radial edges of segments (15) of a polygon underlying the chip-linear conductors from the pads cross the outer edge of the segments in parallel groups. Wider power conductors (232, 233) can also be placed in the pattern.