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    METHOD, SYSTEM AND PCI BUS SYSTEM FOR LIMITING DESTRUCTION OF WRITE DATA
    1.
    发明专利
    METHOD, SYSTEM AND PCI BUS SYSTEM FOR LIMITING DESTRUCTION OF WRITE DATA 失效

    公开(公告)号：JP2001282631A

    公开(公告)日：2001-10-12

    申请号：JP2001055357

    申请日：2001-02-28

    Applicant: IBM

    Inventor： JOSEPH SMITH HYDE II ,  ROBERT R MEDORIN ,  JAN ANTONIO JAHNS

    IPC: G06F13/10 ,  G06F13/00 ,  G06F13/362

    Abstract: PROBLEM TO BE SOLVED: To provide a method, a system and a PCI bus system which limit the destruction of PCI burst writing operation and then increase effective PCI bandwidth, to limit the destruction of write data. SOLUTION: The system for limiting the destruction of the write data has destruction detection logic for monitoring a PCI bus, to sense the destruction of the write data. For monitoring completion of operation commands put in a queue of a PCI bus target, queue level detection logic is used. A bus arbiter responds to destruction level detection logic for detecting the destruction of write data by the target and blocks access to the PCI bus. After the blocking, the bus arbiter responds to command queuing level detection logic. This command queuing level detection logic allows access to the PCI bus, so that a PCI data source can complete burst writing operation without destruction, while a specific number (e.g. 1) operation commands are still put in the command queue.

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