公开(公告)号：DE3068906D1

公开(公告)日：1984-09-13

申请号：DE3068906

申请日：1980-11-20

Applicant: IBM

Inventor： AMES IRVING ,  ANACKER WILHELM ,  GREBE KURT RUDOLPH ,  KIRCHER CHARLES JOHN

IPC: H01L27/18 ,  H01L23/485 ,  H01L23/532 ,  H01L39/02 ,  H01L39/22

Abstract: Circuit connection for electrical circuitry, and particularly superconducting circuits including Josephson tunnelling devices, wherein solder lands can be used to make electrical connection to electric lines without interdiffusion between the lines and the solder. … To avoid the interdiffusion problem, a laterally extending metallic layer (18) is used as a diffusion barrier between the solder land (28) and the electrical line (M) which can be a superconducting line. The diffusion layer is comprised of refractory metal and has a first portion electrically contacting the solder land and a second, laterally displaced portion, electrically contacting the electrical line. An insulating layer (22) on the diffusion barrier layer separates the solder land and the electrical line. In a specific embodiment, the diffusion barrier is comprised of niobium, and the solder is a low melting point alloy, typically comprised of indium, bismuth, and tin.

公开(公告)号：DE2713532A1

公开(公告)日：1978-01-05

申请号：DE2713532

申请日：1977-03-26

Applicant: IBM

Inventor： KIRCHER CHARLES JOHN ,  ZAPPE HANS HELMUT

IPC: H05K3/46 ,  H01L21/3063 ,  H01L21/316 ,  H01L21/3205 ,  H01L23/522 ,  H01L39/24 ,  H01L21/28 ,  H01L39/22

Abstract: A fabrication method for integrated circuits is disclosed wherein a structure is formed on one side of a supporting substrate which provides a ground plane with "X" wiring on one side and "Y" wiring on the other side thereof. The method includes a number of alternative initial planarization steps which permits the resulting device to be substantially planar, thereby allowing it to be used as a substrate for preparation of high density integrated circuits. A first planarization step includes the deposition of a niobium thin film on a doped silicon substrate; the delineation of the desired niobium "X" wiring pattern using well-known photolithographic and etching techniques, leaving the photoresist in place to protect the niobium; the anodization of exposed silicon substrate portions to form silicon dioxide surrounding the niobium to a higher level than the niobium; and the removal of the photoresist.

公开(公告)号：DE3070834D1

公开(公告)日：1985-08-08

申请号：DE3070834

申请日：1980-09-25

Applicant: IBM

Inventor： KIRCHER CHARLES JOHN ,  HUANG HUNG-CHANG WARD ,  MURAKAMI MASANORI

IPC: H01L39/22 ,  H01L39/24

Abstract: Process for fabricating thin film electrodes particularly suited for Josephson devices of improved thermal cyclability comprising the steps of depositing thin films of superconductive metal and an intermetallic compound former on a substrate held at a temperature below about 100 DEG K and at a pressure below about 1 x 10 Torr so that intermetallic compound formation occurs at the grain boundaries of the metal to inhibit grain growth. The thin film electrodes are characterized by median grain size of