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公开(公告)号:US3879840A
公开(公告)日:1975-04-29
申请号:US31157872
申请日:1972-12-04
Applicant: IBM
Inventor: AMES IRVING , D HEURLE FRANCOIS M , HORSTMANN RICHARD E
CPC classification number: H01L23/485 , H01B1/00 , H01B1/023 , H01L21/00 , H01L23/291 , H01L24/45 , H01L27/00 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/4847 , H01L2924/09701 , H01L2924/1305 , H01L2924/14 , Y10S148/02 , Y10S257/904 , Y10S438/927 , H01L2924/00 , H01L2924/00014 , H01L2924/20751 , H01L2924/20752
Abstract: This disclosure provides a copper doped aluminum conductive thin film stripe for use as a current-carrying member in a solid state microelectronic configuration which has substantial resistance against circuit failure due to damage caused by current-induced mass transport in the stripe. It has also been discovered for the practice of this invention that the addition of a relatively small amount of copper to an aluminum stripe together with a suitable heat-treatment enhances the extent of its lifetime during current conduction. Preferably, the percentage copper is from the neighborhood of 0.1 percent to the neighborhood of 10 percent by weight composition of copper in the aluminum and with an annealing heat-treatment in the approximate range of 250* to 560*C. However, for certain operational conditions of the stripe a selected percent less than 54 percent copper by weight composition is advantageous.
Abstract translation: 本公开内容提供了一种用作固态微电子结构中的载流元件的铜掺杂铝导电薄膜条纹,其具有对由于条纹中的电流引起的质量传输引起的损坏导致的电路故障的显着阻力。 对于本发明的实践也已经发现,通过适当的热处理将相对少量的铜加到铝条上,在电流传导期间增加其寿命的程度。 优选地,铜的百分比从铝的0.1%附近到邻近的10重量%的铜组成,并且在大约250℃至560℃的范围内进行退火热处理。然而,对于某些操作 条纹条件选择百分比小于54重量%的铜组成是有利的。
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公开(公告)号:CA731592A
公开(公告)日:1966-04-05
申请号:CA731592D
Applicant: IBM
Inventor: AMES IRVING , TOXEN ARNOLD M , GREGOR LAWRENCE V , LEINER ALAN L
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公开(公告)号:DE2361804A1
公开(公告)日:1974-07-04
申请号:DE2361804
申请日:1973-12-12
Applicant: IBM
Inventor: AMES IRVING
Abstract: A Josephson tunnelling circuit is fabricated by forming layers of insulation and superconducting metallization on a substrate. The layers form Josephson tunnelling junctions, superconducting lines, superconducting contacts and other elements which may be needed. Josephson tunnelling junctions are formed by three layers, a thin tunnelling oxide between two superconducting layers. Superconducting contacts are formed between either of the two superconducting layers and an overlying third superconducting layer. The latter layer includes a metal, preferably indium, which has a free energy of oxide formation which is at least as high - or higher - than the alloys forming the first and second layers.
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公开(公告)号:DE1446186A1
公开(公告)日:1968-11-14
申请号:DE1446186
申请日:1962-11-24
Applicant: IBM
Inventor: AMES IRVING
Abstract: In a vapour deposition process of forming an electrical circuit comprising a series of superposed thin films deposited successively on a substrate, each film is deposited through a pair of masks superimposed one behind the other, one mask, defining a common dimension of all the films, e.g. the width, being used during deposition of all the films together with alternative ones of a series of second masks which define the other dimension, e.g. length of said films. The method is particularly described in relation to the fabrication of an in line cryotron as shown in Figs. 2A and 2B which comprises a substrate 38, a gate conductor 88 of tin, control conductors 90, 92 of lead, insulating layers 94, 96 of silicon monoxide and connectors 98, 100, 102, 104 and 106, 108. The apparatus for the vapour deposition process is shown in Fig. 1A and comprises a vacuum chamber 10, evaporation sources 30, 32, 34, a substrate 38 and a mask holder 42 which is slideably engaged with a mask support 40 so that a selected mask 44, 46, 48 or 50 may be located over mask 60 which is the first mask positioned over substrate 38. The mask holder 42 is operated by a connecting rod 62 and the mask 60 which determines the common dimension of the deposits is first located over the substrate 38 and is held in position by a magnet 66. Mask 44 is then selected and positioned adjacent mask 60 by means of the rod 62 and in this position the first film is evaporated and deposited in the required shape determined by the two masks. The further layers are then formed by positioning the required mask over mask 60 until the required number or layers have been formed.
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公开(公告)号:GB1088679A
公开(公告)日:1967-10-25
申请号:GB5183464
申请日:1964-12-21
Applicant: IBM
Inventor: AMES IRVING , CASWELL HOLLIS LELAND
IPC: H01L21/316 , H01L21/3205 , H01L23/485 , H01L23/532
Abstract: 1,088,679. Semi-conductor device. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 21, 1964 [Dec. 26, 1963], No. 51834/64. Heading H1K. The connections to the electrodes of a semiconductor device are produced by depositing a first aluminium oxide layer on the substrate, depositing a conductive pattern, of a material having a similar coefficient-of expansion to that of silicon oxide, to make contact with the device, and depositing a second layer of aluminium oxide over the conductive pattern. As shown the electrodes of a transistor or diode 12 diffused into a silicon substrate 10 are contacted by depositing an aluminium oxide layer 14 over the entire surface except the contact regions, and depositing a contact strip 16 of tungsten or molybdenum over the layer A small region 22 of aluminium oxide is deposited across the first strip and a conductive strip 20 is deposited over this to form an insulated crossing. Both conductive strips are then protected with a further aluminium oxide layer 24. The end portion 18 of conductive strip 16 is left exposed to allow external connections to be made by soldering or by a pressure contact. The aluminium oxide layers may be produced by vapour deposition of aluminium in a high oxygen partial pressure, by thermal evaporation produced by electron bombardment heating of Al 2 O 3 , or by reactive sputtering of aluminium in an oxygen atmosphere. The conductive strips may be deposited by sputtering or thermal evaporation. Reference has been directed by the Comptroller to Specification 900,334.
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公开(公告)号:DE3068906D1
公开(公告)日:1984-09-13
申请号:DE3068906
申请日:1980-11-20
Applicant: IBM
Inventor: AMES IRVING , ANACKER WILHELM , GREBE KURT RUDOLPH , KIRCHER CHARLES JOHN
IPC: H01L27/18 , H01L23/485 , H01L23/532 , H01L39/02 , H01L39/22
Abstract: Circuit connection for electrical circuitry, and particularly superconducting circuits including Josephson tunnelling devices, wherein solder lands can be used to make electrical connection to electric lines without interdiffusion between the lines and the solder. … To avoid the interdiffusion problem, a laterally extending metallic layer (18) is used as a diffusion barrier between the solder land (28) and the electrical line (M) which can be a superconducting line. The diffusion layer is comprised of refractory metal and has a first portion electrically contacting the solder land and a second, laterally displaced portion, electrically contacting the electrical line. An insulating layer (22) on the diffusion barrier layer separates the solder land and the electrical line. In a specific embodiment, the diffusion barrier is comprised of niobium, and the solder is a low melting point alloy, typically comprised of indium, bismuth, and tin.
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公开(公告)号:CA1142264A
公开(公告)日:1983-03-01
申请号:CA365924
申请日:1980-12-02
Applicant: IBM
Inventor: AMES IRVING , ANACKER WILHELM , GREBE KURT R , KIRCHER CHARLES J
IPC: H01L27/18 , H01L23/485 , H01L23/532 , H01L39/02 , H01L39/22
Abstract: CONTACT TECHNIQUE FOR ELECTRICAL CIRCUITRY . In electrical circuitry, and particularly superconducting circuitry including Josephson tunnelling devices, it is often necessary to provide solder contacts to electrical lines, where the electrical lines would be destroyed if there were interdiffusion between the lines and the solder. To avoid this problem, a laterally extending metallic layer is used as a diffusion barrier between the solder land and the electrical line which can be a superconducting line. The diffusion barrier is comprised of a refractory metal which has a first portion electrically contacting the solder land and a second, laterally displaced portion electrically contacting the electrical line. An insulating protective layer on the diffusion barrier layer separates the solder land and the electrical line. In a specific embodiment, the superconducting electrical line is comprised of an alloy of lead while the diffusion barrier is comprised of niobium, and the solder alloy is a low melting point alloy, typically comprised of indium, bismuth,
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公开(公告)号:CA1024659A
公开(公告)日:1978-01-17
申请号:CA188786
申请日:1973-12-21
Applicant: IBM
Inventor: AMES IRVING
Abstract: A Josephson tunnelling circuit is fabricated by forming layers of insulation and superconducting metallization on a substrate. The layers form Josephson tunnelling junctions, superconducting lines, superconducting contacts and other elements which may be needed. Josephson tunnelling junctions are formed by three layers, a thin tunnelling oxide between two superconducting layers. Superconducting contacts are formed between either of the two superconducting layers and an overlying third superconducting layer. The latter layer includes a metal, preferably indium, which has a free energy of oxide formation which is at least as high - or higher - than the alloys forming the first and second layers.
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