公开(公告)号：BR8104224A

公开(公告)日：1982-03-23

申请号：BR8104224

申请日：1981-07-02

Applicant: IBM

Inventor： CHISHOLM DOUGLAS R ,  KURTZ HOBART L

IPC: G06F13/14 ,  G06F12/02 ,  G06F12/06 ,  G06F3/04

Abstract: A peripheral device address assignment mechanism is described which does not require the use of plugboards or jumpers. This mechanism enables a host processor to select any desired peripheral device and set its device address to any desired value at any desired time. This is accomplished by providing each peripheral device control unit with a loadable device address register for holding the device address assigned to its peripheral device. Each device control unit is further provided with circuitry responsive to the appearance of a unique I/O command on the processor I/O bus and to the activation of a unique set of the I/O bus data lines by the processor for loading into its device address register the desired device address value as supplied thereto by the processor via the I/O bus.

公开(公告)号：CA1199416A

公开(公告)日：1986-01-14

申请号：CA440692

申请日：1983-11-08

Applicant: IBM

Inventor： KELLEY RICHARD A ,  KURTZ HOBART L ,  MAGRISSO ISRAEL B ,  QUANSTROM JACK L

IPC: G06F13/37 ,  G06F13/14 ,  G06F13/20

Abstract: An arbitration technique is described for use in conjunction with a parallel bus structure. Essentially, it involves the use of a Request signal instead of an Acknowledge signal as the propagated polling signal and making use of the delay elements in each bus unit, which act in parallel with poll propagation and with each other to reduce the net poll propagation time. Making use of the Request signal allows initiation of arbitration prior to the activation time of the Acknowledge line.

公开(公告)号：BR8306942A

公开(公告)日：1984-07-24

申请号：BR8306942

申请日：1983-12-18

Applicant: IBM

Inventor： KELLEY RICHARD A ,  KURTZ HOBART L ,  MAGRISSO ISRAEL B ,  QUANSTROM JACK L

IPC: G06F13/37 ,  G06F15/16 ,  G06F9/46