公开(公告)号：DE1764336A1

公开(公告)日：1972-03-23

申请号：DE1764336

申请日：1968-05-18

Applicant: IBM

Inventor： FEINBERG IRVING ,  LEE LANGDON JACK ,  LEE SITLER CARL

IPC: H01L21/8222 ,  H01L23/04 ,  H01L27/06 ,  H01L27/118 ,  H01L19/00

Abstract: 1,236,404. Integrated circuits. INTERNATIONAL BUSINESS MACHINES CORP. 9 May, 1968 [23 May, 1967], No. 46663/70. Divided out of 1,236,401. Heading H1K. The disclosure is identical with that of Specification 1,236,401 from which the present application is divided but the claims relate to a semi-conductor wafer comprising a plurality of areas each including a number of devices interconnected to form a circuit, the areas being in a co-ordinate array to permit dicing by intersecting sets of cuts and each being provided with a graded mark on two of its edges to permit a visual indication of the accuracy of dicing.

公开(公告)号：DE1296265B

公开(公告)日：1969-05-29

申请号：DEJ0027385

申请日：1965-01-23

Applicant: IBM

Inventor： LEE LANGDON JACK ,  PHILIP PECORARO RAYMOND ,  EUGENE HARDING WILLIAM

IPC: H01L21/00 ,  H01L23/485

Abstract: 1,021,359. Connections to semi-conductors. INTERNATIONAL BUSINESS MACHINES CORPORATION. Jan. 15, 1965 [Jan. 27, 1964], No. 1798/65. Heading H1K. An electrical connection is made to part of the surface of a semi-conductor body having an insulating layer thereover, by forming on said layer a coating of readily solderable material, making an opening in the layer and the coating to expose part of the surface, depositing a metal to form an ohmic contact on said exposed surface and on the walls of the opening and to overlap a portion of said coating whilst leaving another portion unexposed. To make a device as shown in Fig. 10, wherein silicon body 1 has an oxide film 2 and an ohmic aluminium metal contact 11 with a readily solderable material 8, successive coating, photo-resist and etching steps are used (illustrated in detail, Figs. 1 to 9, not shown). The readily solderable material may be Cr or Mo having an upper layer of Ni or Ag whilst the ohmic contact may also be formed by Au, Pd or Pt but Al is preferred. Ge bodies may also be treated. The oxide layer 2 may have a glass layer interposed between it and the metal layer 8. The finished article may be encapsulated in glass.

公开(公告)号：DE2022457A1

公开(公告)日：1970-11-19

申请号：DE2022457

申请日：1970-05-08

Applicant: IBM

Inventor： LEE LANGDON JACK

IPC: H01L21/74 ,  H01L23/535 ,  H01L27/02 ,  H01L19/00

Abstract: To eliminate parasitic voltage drops to electrodes of semiconductor devices built on a semiconductor chip or wafer, due to the use of an element of a voltage and current supply conductor in common for several such semiconductor devices, a separate path is diffused for each electrode, onto such chip or wafer as a built-up post of the basic semiconductor material of the chip or wafer, and the back surface of the chip or wafer is used as a relatively wide area surface as a voltage supply bus, which may also be connected to a metal base for the double purpose of establishing that surface at some selected known potential and providing a good heat sink for the chip or wafer. Generally, the potential of the metal base may be placed at ground, but need not be.

公开(公告)号：DE1489017A1

公开(公告)日：1970-07-02

申请号：DE1489017

申请日：1964-06-24

Applicant: IBM

Inventor： LEE LANGDON JACK ,  PH PECORARO RAYMOND

IPC: H01L21/00 ,  H01L23/29 ,  H01L23/485 ,  H01L23/58 ,  H01L7/16

公开(公告)号：DE1589917A1

公开(公告)日：1970-06-04

申请号：DE1589917

申请日：1967-01-05

Applicant: IBM

Inventor： LEE LANGDON JACK

IPC: C30B31/00 ,  H01L21/00 ,  H01L21/22 ,  H01L29/00 ,  H01L29/73 ,  H01L29/86

Abstract: 1,142,068. Semi-conductor device. INTERNATIONAL BUSINESS MACHINES CORP. 5 Dec., 1966 [14 Jan., 1966], No. 54311/66. Heading H1K. A method of manufacturing a semi-conductor device comprises the steps of forming openings in a masking layer on a surface of a semiconductive wafer of a first conductivity-type, diffusing an impurity through said openings to produce spaced regions of opposite conductivity-type at the surface of said wafer, said spaced regions being of the same conductivity type and having a gap therebetween, forming another opening in the masking layer on said surface overlying said spaced regions, diffusing an impurity therethrough to produce another region of said opposite conductivity type which with said spaced regions forms a base region for said device, and thereafter diffusing an impurity into said base region to produce an emitter region overlying a portion of the base region defined by said gap. Boron is diffused at 970‹ C. into an n-type Si wafer 10 through two openings in a silicon oxide mask (12), to give two separate p-type regions (16, Fig. 2a, not shown). In a second diffusion step an additional area is opened in the oxide mask overlying the two regions and more boron diffused in to give a shallow p-type region (22) connecting the two regions together (Fig. 3a, not shown). An oxide layer 24 having an opening 26 is then provided and phosphorus diffused in at 900‹ C. to give an n-type emitter region 28. An ohmic contact 40 is provided for base region 30. In an alternative embodiment, the mask opening for the second diffusion stage may have the same width as that used in the third stage.