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公开(公告)号:DE1296265B
公开(公告)日:1969-05-29
申请号:DEJ0027385
申请日:1965-01-23
Applicant: IBM
Inventor: LEE LANGDON JACK , PHILIP PECORARO RAYMOND , EUGENE HARDING WILLIAM
IPC: H01L21/00 , H01L23/485
Abstract: 1,021,359. Connections to semi-conductors. INTERNATIONAL BUSINESS MACHINES CORPORATION. Jan. 15, 1965 [Jan. 27, 1964], No. 1798/65. Heading H1K. An electrical connection is made to part of the surface of a semi-conductor body having an insulating layer thereover, by forming on said layer a coating of readily solderable material, making an opening in the layer and the coating to expose part of the surface, depositing a metal to form an ohmic contact on said exposed surface and on the walls of the opening and to overlap a portion of said coating whilst leaving another portion unexposed. To make a device as shown in Fig. 10, wherein silicon body 1 has an oxide film 2 and an ohmic aluminium metal contact 11 with a readily solderable material 8, successive coating, photo-resist and etching steps are used (illustrated in detail, Figs. 1 to 9, not shown). The readily solderable material may be Cr or Mo having an upper layer of Ni or Ag whilst the ohmic contact may also be formed by Au, Pd or Pt but Al is preferred. Ge bodies may also be treated. The oxide layer 2 may have a glass layer interposed between it and the metal layer 8. The finished article may be encapsulated in glass.
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公开(公告)号:DE1564218A1
公开(公告)日:1970-01-08
申请号:DE1564218
申请日:1966-12-20
Applicant: IBM
Inventor: PHILIP PECORARO RAYMOND , BILOUS OREST
IPC: H01L21/74 , H01L27/00 , H01L29/00 , H01L29/735 , H01L11/00
Abstract: 1,159,937. Transistors. INTERNATIONAL BUSINESS MACHINES CORP. 9 Dec., 1966 [22 Dec., 1965], No. 55215/66. Heading H1K. A transistor is made by forming side by side emitter and collector zones 1000-3000 Š apart in one face of a semi-conductor layer or body by diffusion through oxide masking. Typically the two zones are of the same shape and size and their functions interchangeable, with the base contact substantially surrounding the area occupied by them. A gate electrode is preferably provided on the oxide layer over the emitter-collector gap to enable the transconductance of the device to be varied or to allow its use as an insulated gate FET with the base electrode disconnected. Base resistance may be reduced by a heavily doped zone formed by diffusion into the substrate prior to formation of the base zone proper by epitaxial deposition, the zone being extended to the base contact region by inward diffusion.
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公开(公告)号:DE1589935A1
公开(公告)日:1972-03-30
申请号:DE1589935
申请日:1967-03-25
Applicant: IBM
Inventor: AGUSTA BENJAMIN , HAROLD BARDELL PAUL , PHILIP CASTRUCCI PAUL , ATHANISUS HENLE ROBERT , PHILIP PECORARO RAYMOND
IPC: H01L27/08 , G11C11/411 , H03K3/286 , H03K3/288 , H01L19/00
Abstract: A monolithic integrated memory arrangement comprising, in combination, a plurality of individual memory cells, functionally isolated and electrically interconnected, in which each of said memory cells is object or corresponding to another memory cell mirroring mirror image, in vertical, horizontal and diagonal direction. (Machine-translation by Google Translate, not legally binding)
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公开(公告)号:DE1564170A1
公开(公告)日:1970-10-15
申请号:DE1564170
申请日:1966-08-16
Applicant: IBM
Inventor: BILOUS OREST , ROBERT MEULEMANS DARRELL , PHILIP PECORARO RAYMOND , CRANSTON SCLBY MICHAEL
IPC: H01L29/73 , H01L21/00 , H01L21/331 , H01L23/485 , H01L27/00 , H01L29/00 , H01L29/861 , H01L3/00
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