公开(公告)号：FR2285737A1

公开(公告)日：1976-04-16

申请号：FR7525143

申请日：1975-08-07

Applicant: IBM

Inventor： KNEPPER RONALD W ,  LANE RALPH D ,  LUDLOW PETER J ,  MOORE BARRY L

IPC: H03K17/08 ,  H02H3/08 ,  H02H3/093 ,  H02H7/20 ,  H03K17/082 ,  H03K19/0185

Abstract: An over current protect circuit for a common bus driver having a complementary pair FET output includes a pair of AND circuits responsive to the gate-source and drain-source voltages for charging separate time integrating capacitors. If a threshold charge is reached a latch is triggered, which in turn disables the driver via a NAND gate and Inverter, and discharges the active capacitor. The latch is reset by dropping the driver enable line. As an alternative, high driver current may be sensed by placing a resistor in series with each output FET and charging the associated capacitor in response to a high current through the resistor.

公开(公告)号：DE2538453A1

公开(公告)日：1976-04-01

申请号：DE2538453

申请日：1975-08-29

Applicant: IBM

Inventor： KNEPPER RONALD W ,  LANE RALPH D ,  LUDLOW PETER J ,  MOORE BARRY L

IPC: H03K17/08 ,  H02H3/08 ,  H02H3/093 ,  H02H7/20 ,  H03K17/082 ,  H03K19/0185 ,  H02H7/12

Abstract: An over current protect circuit for a common bus driver having a complementary pair FET output includes a pair of AND circuits responsive to the gate-source and drain-source voltages for charging separate time integrating capacitors. If a threshold charge is reached a latch is triggered, which in turn disables the driver via a NAND gate and Inverter, and discharges the active capacitor. The latch is reset by dropping the driver enable line. As an alternative, high driver current may be sensed by placing a resistor in series with each output FET and charging the associated capacitor in response to a high current through the resistor.

公开(公告)号：DE2359646A1

公开(公告)日：1974-07-04

申请号：DE2359646

申请日：1973-11-30

Applicant: IBM

Inventor： LUDLOW PETER J ,  TAI EUGENIO

IPC: H03F3/16 ,  H03F1/30 ,  H03F3/34 ,  H03F3/345 ,  H03K3/353 ,  H03K17/06 ,  H03K19/0175 ,  H03K19/094 ,  H03K5/02 ,  G11C7/06

Abstract: A bootstrap FET driver amplifier having a precharged relatively higher gate voltage and a relatively lower drain voltage obtained from a common power source. The gate voltage is derived from recurrent pulses produced by an on-chip FET free-running multi-vibrator and a voltage multiplier circuit powered from said power source. The pulse width of the recurrent pulses varies as an inverse function of the transconductance of the on-chip FETs and as a direct function of the threshold voltage of the on-chip FETs. The pulse width controls the charging time of a voltage booster capacitor in the voltage multiplier circuit whereby the amplitude of the boosted voltage is a direct function of the pulse width. The boosted voltage is applied to the gate of the bootstrap FET driver amplifier.