公开(公告)号：DE2538453A1

公开(公告)日：1976-04-01

申请号：DE2538453

申请日：1975-08-29

Applicant: IBM

Inventor： KNEPPER RONALD W ,  LANE RALPH D ,  LUDLOW PETER J ,  MOORE BARRY L

IPC: H03K17/08 ,  H02H3/08 ,  H02H3/093 ,  H02H7/20 ,  H03K17/082 ,  H03K19/0185 ,  H02H7/12

Abstract: An over current protect circuit for a common bus driver having a complementary pair FET output includes a pair of AND circuits responsive to the gate-source and drain-source voltages for charging separate time integrating capacitors. If a threshold charge is reached a latch is triggered, which in turn disables the driver via a NAND gate and Inverter, and discharges the active capacitor. The latch is reset by dropping the driver enable line. As an alternative, high driver current may be sensed by placing a resistor in series with each output FET and charging the associated capacitor in response to a high current through the resistor.

公开(公告)号：FR2285737A1

公开(公告)日：1976-04-16

申请号：FR7525143

申请日：1975-08-07

Applicant: IBM

Inventor： KNEPPER RONALD W ,  LANE RALPH D ,  LUDLOW PETER J ,  MOORE BARRY L

IPC: H03K17/08 ,  H02H3/08 ,  H02H3/093 ,  H02H7/20 ,  H03K17/082 ,  H03K19/0185

Abstract: An over current protect circuit for a common bus driver having a complementary pair FET output includes a pair of AND circuits responsive to the gate-source and drain-source voltages for charging separate time integrating capacitors. If a threshold charge is reached a latch is triggered, which in turn disables the driver via a NAND gate and Inverter, and discharges the active capacitor. The latch is reset by dropping the driver enable line. As an alternative, high driver current may be sensed by placing a resistor in series with each output FET and charging the associated capacitor in response to a high current through the resistor.