TEST CIRCUITRY FOR DETERMINING TURN-ON AND TURN-OFF DELAYS OF LOGIC CIRCUITS

    公开(公告)号:DE3363913D1

    公开(公告)日:1986-07-10

    申请号:DE3363913

    申请日:1983-06-08

    Applicant: IBM

    Abstract: Test circuitry (2...6, 8, 9) that is particularly suitable for inclusion on an LSI chip when testing a new technology or process. The circuitry will enable accurate determination of the turn-on and turn-off delays of logic circuits (1) on the chip. These determinations are based upon a comparison of the periods of different signals (REFERENCE, TON, TOFF) obtainable from the test circuitry. The effects of varying loads (7) upon the turn-on and turn-off delays can also be determined with this circuitry by attaching different loads selectively to the tested logic circuit. Individual testing of plural logic circuits is possible by providing means for selectively attaching any one of these logic circuits to the test circuitry.

    2.
    发明专利
    未知

    公开(公告)号:DE69208415D1

    公开(公告)日:1996-03-28

    申请号:DE69208415

    申请日:1992-09-11

    Applicant: IBM

    Abstract: A direct distribution wiring system is provided which facilitates the effecting of repair or engineering change in a Multi-chip module (MCM) while eliminating the need for redistribution and/or buried connections between IC attachment pads and engineering change pads, thus eliminating the need for patterned conductor layers corresponding to such functions. The operation of the MCM is improved by the wiring system allowing the reduction of lumped capacitances by disconnection of defective conductors, accomplished by providing severable connectors in a direct distribution structure, as well as the elimination of redistribution wiring layers and increased IC density on the MCM. Full potential fault coverage as well as full discretion in reversible engineering changes is provided by forming all elements of the wiring system on the surface of the device.

    3.
    发明专利
    未知

    公开(公告)号:DE69208415T2

    公开(公告)日:1996-09-19

    申请号:DE69208415

    申请日:1992-09-11

    Applicant: IBM

    Abstract: A direct distribution wiring system is provided which facilitates the effecting of repair or engineering change in a Multi-chip module (MCM) while eliminating the need for redistribution and/or buried connections between IC attachment pads and engineering change pads, thus eliminating the need for patterned conductor layers corresponding to such functions. The operation of the MCM is improved by the wiring system allowing the reduction of lumped capacitances by disconnection of defective conductors, accomplished by providing severable connectors in a direct distribution structure, as well as the elimination of redistribution wiring layers and increased IC density on the MCM. Full potential fault coverage as well as full discretion in reversible engineering changes is provided by forming all elements of the wiring system on the surface of the device.

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