公开(公告)号：EP1709671A4

公开(公告)日：2010-06-16

申请号：EP04703076

申请日：2004-01-16

Applicant: IBM

Inventor： CHEN HUAJIE ,  BEDELL STEPHEN W ,  SADANA DEVENDRA K ,  MOCUTA DAN M

IPC: H01L21/331 ,  H01L21/20 ,  H01L21/205 ,  H01L21/316 ,  H01L21/762 ,  H01L21/84 ,  H01L29/10 ,  H01L29/786

CPC classification number: H01L21/76256 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/31658 ,  H01L21/84 ,  H01L29/1054 ,  H01L29/78687

公开(公告)号：JP2003332462A

公开(公告)日：2003-11-21

申请号：JP2003109064

申请日：2003-04-14

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

Inventor： MOCUTA ANDA C ,  IEONG MEIKEI ,  AMOS RICKY S ,  DAINE C BOYD ,  MOCUTA DAN M ,  CHEN HUAJIE

IPC: H01L29/423 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/49

CPC classification number: H01L21/823807 ,  H01L21/823828

Abstract: PROBLEM TO BE SOLVED: To provide a high performance (surface channel) CMOS device provided with a mid gap work function metal gate.
SOLUTION: An epitaxial layer is used for adjustment/reduction of a threshold voltage V
t of PFET region and large amount of reduction in V
t (up to 500 mV) which are required by a CMOS device provided with a mid gap metal gate. In this case, the counter doping using an in-site B (boron) doped epitaxial layer or B and C (carbon) codoped epitaxial layer is provided. Here, the doping of C is important to give a surface channel CMOS device provided with the mid gap metal gate while an excellent short channel effect is maintained by holding the shallow B profile through the additional degree of freedom to relaxing the diffusion of B (even in the case of the subsequent activation heat cycle).
COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供一种具有中间间隙功能金属栅极的高性能（表面通道）CMOS器件。 解决方案：使用外延层来调整/降低PFET区域的阈值电压V t ，并且V T 的大量还原（高达500mV ），这是由设置有中间间隙金属栅极的CMOS器件所需要的。 在这种情况下，提供使用现场B（硼）掺杂外延层或B和C（碳）共掺杂外延层的反掺杂。 这里，C的掺杂对于提供具有中间间隙金属栅极的表面沟道CMOS器件而言是重要的，同时通过保持浅的B分布通过附加的自由度来放宽B的扩散（甚至 在随后的活化热循环的情况下）。 版权所有（C）2004，JPO