公开(公告)号：MY141640A

公开(公告)日：2010-05-31

申请号：MYPI9706319

申请日：1997-12-26

Applicant: IBM

Inventor： FEILCHENFELD NATALIE BARBARA ,  KRESGE JOHN STEVEN ,  MOORE SCOTT PRESTON ,  NOWAK RONALD PETER ,  WILSON JAMES WARREN

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/60 ,  H01L23/04 ,  H01L23/12 ,  H01L23/14 ,  H01L23/48 ,  H01L23/498 ,  H01L23/52 ,  H05K1/05 ,  H05K3/40 ,  H05K3/46

Abstract: THE PRESENT INVENTION PROVIDES AN ORGANIC CHIP CARRIER (10) PARTICULARLY USEFUL WITH FLIP CHIPS (42), COMPRISING AN ORGANIC DIELECTRIC LAYER (22), A FIRST LAYER OF CIRCUITRY (25) DISPOSED ON THE DIELECTRIC LAYER, AN ORGANIC CONFORMATIONAL COATING (34) DISPOSED OVER THE FIRST LAYER OF DIELECTRIC AND THE FIRST LAYER OF CIRCUITRY, AND A LAYER OF FINE LINE CIRCUITRY (40) HAVING LINE WIDTH OF ABOUT 0. 0508 MM (2.0 MIL) OR LESS. PREFERABLY ABOUT 0.0254 MM (1.0 MIL) OR LESS, PREFERABLY ABOUT 0.01778 MM (0.7 MIL), AND A SPACE BETWEEN LINES OF ABOUT 0.0381 MM (1.5 MIL) OR LESS, PREFERABLY ABOUT 0.02794 MM (1.1 MIL) OR LESS, DISPOSED ON THE CONFORMATIONAL LAYER. PREFERABLY THE DIELECTRIC LAYER IS FREE OF WOVEN FIBER GLASS. THE CONFORMATIONAL COATING PREFERABLY HAS A DIELECTRIC CONSTANT OF ABOUT 1.5 TO ABOUT 3.5, AND A PERCENT PLANARIZATION OF GREATER THAN ABOUT 3.5%. THE INVENTION ALSO RELATES TO METHODS OF MAKING THE DIELECTRIC COATED CHIP CARRIER.

公开(公告)号：DE69615930D1

公开(公告)日：2001-11-22

申请号：DE69615930

申请日：1996-05-17

Applicant: IBM

Inventor： WILSON JAMES WARREN ,  ENGLE STEPHEN ROBERT ,  MOORE SCOTT PRESTON

IPC: H01L21/60 ,  H01L23/12 ,  H01L23/13 ,  H01L23/36 ,  H01L23/367 ,  H01L23/373 ,  H01L23/498

Abstract: Thermally enhanced electronic package (30) has a first electronic component (32) and a number of discrete connectors (36) bonded to a thermally conductive member (34) having a first coefficient of thermal expansion. The connectors have at least one coefficient of thermal expansion different from the first and have fusible conductors (38) on at least one surface and conductive passageways, the electronic component being electrically connected to the passageways in the members and via them to the fusible conductors.

公开(公告)号：HK1010605A1

公开(公告)日：1999-06-25

申请号：HK98111590

申请日：1998-10-29

Applicant: IBM

Inventor： FEILCHENFELD NATALIE BARBARA ,  KRESGE JOHN STEVEN ,  MOORE SCOTT PRESTON ,  NOWAK RONALD PETER ,  WILSON JAMES WARREN

IPC: H01L21/48 ,  H01L21/60 ,  H01L23/12 ,  H01L23/14 ,  H01L23/498 ,  H05K1/05 ,  H05K3/40 ,  H05K3/46 ,  H01L ,  H05K

Abstract: The present invention provides an organic chip carrier particularly useful with flip chips. The chip carrier comprises an organic dielectric layer, a first layer of circuitry disposed on the dielectric layer, an organic conformational coating disposed over the first layer of dielectric and the first layer of circuitry, and a layer of fine line circuitry. The fine line circuitry has a line width of about 2.0 mil or less, preferably about 1.0 mil or less, and more preferably about 0.7 mil, and a space between lines of about 1.5 mil or less, preferably about 1.1 mil or less. Preferably the dielectric layer is free of woven fiber glass. The conformational coating preferably has a dielectric constant of about 1.5 to about 3.5, and a percent planarization of greater than about 30%. The invention also relates to methods of making the dielectric coated chip carrier.

公开(公告)号：SG60177A1

公开(公告)日：1999-02-22

申请号：SG1997004679

申请日：1997-12-24

Applicant: IBM

Inventor： FEILCHENFELD NATALIE BARBARA ,  KRESGE JOHN STEVEN ,  MOORE SCOTT PRESTON ,  NOWAK RONALD PETER ,  WILSON JAMES WARREN

IPC: H01L21/48 ,  H01L21/60 ,  H01L23/12 ,  H01L23/14 ,  H01L23/498 ,  H05K1/05 ,  H05K3/40 ,  H05K3/46 ,  H05K1/18

Abstract: The present invention provides an organic chip carrier particularly useful with flip chips. The chip carrier comprises an organic dielectric layer, a first layer of circuitry disposed on the dielectric layer, an organic conformational coating disposed over the first layer of dielectric and the first layer of circuitry, and a layer of fine line circuitry. The fine line circuitry has a line width of about 2.0 mil or less, preferably about 1.0 mil or less, and more preferably about 0.7 mil, and a space between lines of about 1.5 mil or less, preferably about 1.1 mil or less. Preferably the dielectric layer is free of woven fiber glass. The conformational coating preferably has a dielectric constant of about 1.5 to about 3.5, and a percent planarization of greater than about 30%. The invention also relates to methods of making the dielectric coated chip carrier.