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公开(公告)号:JPH02173129A
公开(公告)日:1990-07-04
申请号:JP27620489
申请日:1989-10-25
Applicant: IBM
Inventor: MORISU ANSHIERU , UOORUTAA POORU PAUROUSUKII
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公开(公告)号:JPH04234157A
公开(公告)日:1992-08-21
申请号:JP21422291
申请日:1991-08-01
Applicant: IBM
Inventor: MORISU ANSHIERU , HOSE AGUSUCHIN BAABOSA , ERITSUKU POORU DEITSUBURU , JIYOSEFU FUNARI , JIYON SUTEIIBUN KURESUGE , CHIYAARUZU ROBAATO RAMU , RICHIYAADO JIERARUDO MAAFUII , SUKOTSUTO DEBITSUDO RENORUZU , BAAGATSUTO GAAREBU SAMAKIA , TAAMAA ARAN SHIYORUTSU , UEIN RATSUSERU SUTOORU JIYUNIA
IPC: H01L23/36 , H01L23/538 , H01L25/065 , H01L25/07 , H01L25/18 , H05K1/18
Abstract: PURPOSE: To provide an ultra-compact electronic package that is suited for a high memory capacity and a high memory density, and to use a double-sided surface-mount technology assembly additionally. CONSTITUTION: A package 1 contains a plurality of IC memory chips 11 that are adhered to a circuited flexible tape substrate 21, and the circuited flexible tape substrate 21 is adhered to a printed circuit board 31 later. The circuited flexible tape substrate 21 is extended outward from the printed circuit board 31 and has a plurality of IC memory chips 11 mounted to an I/O pad on it. Each IC memory chip 11 is in contact with a heat sink means 41 on a surface that is opposite to the flexible tape substrate 21. The flexible tape substrate 21 and the heat sink means 41 are joined to the printed circuit board 31.
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