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公开(公告)号:DE69008770D1
公开(公告)日:1994-06-16
申请号:DE69008770
申请日:1990-01-11
Applicant: IBM
Inventor: CHANG LEROY L , ESAKI LEO , MUNEKATA HIRO , OHNO HIDEO , VON MOLNAR STEPHAN
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公开(公告)号:BR9201840A
公开(公告)日:1993-01-05
申请号:BR9201840
申请日:1992-05-15
Applicant: IBM
Inventor: FUKUZAWA TODASHI , MUNEKATA HIRO
IPC: H01L29/06 , H01L21/18 , H01L21/265 , H01L21/335 , H01L21/337 , H01L21/338 , H01L25/065 , H01L29/80 , H01L29/812 , H01L21/28
Abstract: Disclosed is a new method suitable for making highly integrated quantum wire arrays, quantum dot arrays in a single crystal compound semiconductor and FETs of less than 0.1 micron gate length. This makes it possible to construct a high-performance electronic device with high speed and low power consumption, using a combination of low-temperature-growth molecular beam epitaxy (LTG-MBE) and focused ion beam (FIB) implantation. The compound semiconductor (GaAs) epitaxial layers, which are made by LTG-MBE, are used as targets of Ga FIB implantation to make Ga wire or dot arrays. Precipitation of arsenic microcrystals, which are initially embedded in a single crystal GaAs layer and act as Schottky barriers, are typically observed in an LTG GaAs layer. A thermal annealing process, after implantation, changes the arsenic microcrystals to GaAs crystals if the arsenic microcrystals are in the region in which the Ga ions are implanted. A wire-like shape free of As microcrystals then acts as a quantum wire for electrons or holes whereas a dot-like shape free of As microcrystals acts as a quantum dot. The co-existence of Ga ions and dopant ions, which provides conductivity type carriers opposite to the conductivity type of the majority carriers of a channel region of an FET, provides the fabrication of very narrow junction gate region for any FET.
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公开(公告)号:DE69008770T2
公开(公告)日:1994-11-24
申请号:DE69008770
申请日:1990-01-11
Applicant: IBM
Inventor: CHANG LEROY L , ESAKI LEO , MUNEKATA HIRO , OHNO HIDEO , VON MOLNAR STEPHAN
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公开(公告)号:CA2066002C
公开(公告)日:1996-01-30
申请号:CA2066002
申请日:1992-04-14
Applicant: IBM
Inventor: FUKUZAWA TADASHI , MUNEKATA HIRO
IPC: H01L29/06 , H01L21/18 , H01L21/265 , H01L21/335 , H01L21/337 , H01L21/338 , H01L25/065 , H01L29/80 , H01L29/812 , H01L21/20 , H01L21/321
Abstract: Disclosed is a new method suitable for making highly integrated quantum wire arrays, quantum dot arrays in a single crystal compound semiconductor and FETs of less than 0.1 micron gate length. This makes it possible to construct a high-performance electronic device with high speed and low power consumption, using a combination of low-temperature-growth molecular beam epitaxy (LTG-MBE) and focused ion beam (FIB) implantation. The compound semiconductor (GaAs) epitaxial layers, which are made by LTG-MBE, are used as targets of Ga FIB implantation to make Ga wire or dot arrays. Precipitation of arsenic microcrystals, which are initially embedded in a single crystal GaAs layer and act as Schottky barriers, are typically observed in an LTG GaAs layer. A thermal annealing process, after implantation, changes the arsenic microcrystals to GaAs crystals if the arsenic microcrystals are in the region in which the Ga ions are implanted. A wire-like shape free of As microcrystals then acts as a quantum wire for electrons or holes whereas a dot-like shape free of As microcrystals acts as a quantum dot. The co-existence of Ga ions and dopant ions, which provides conductivity type carriers opposite to the conductivity type of the majority carriers of a channel region of an FET, provides the fabrication of very narrow junction gate region for any FET.
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公开(公告)号:CA2066002A1
公开(公告)日:1992-11-18
申请号:CA2066002
申请日:1992-04-14
Applicant: IBM
Inventor: FUKUZAWA TADASHI , MUNEKATA HIRO
IPC: H01L29/06 , H01L21/18 , H01L21/265 , H01L21/335 , H01L21/337 , H01L21/338 , H01L25/065 , H01L29/80 , H01L29/812 , H01L21/20 , H01L21/321
Abstract: Disclosed is a new method suitable for making highly integrated quantum wire arrays, quantum dot arrays in a single crystal compound semiconductor and FETs of less than 0.1 micron gate length. This makes it possible to construct a high-performance electronic device with high speed and low power consumption, using a combination of low-temperature-growth molecular beam epitaxy (LTG-MBE) and focused ion beam (FIB) implantation. The compound semiconductor (GaAs) epitaxial layers, which are made by LTG-MBE, are used as targets of Ga FIB implantation to make Ga wire or dot arrays. Precipitation of arsenic microcrystals, which are initially embedded in a single crystal GaAs layer and act as Schottky barriers, are typically observed in an LTG GaAs layer. A thermal annealing process, after implantation, changes the arsenic microcrystals to GaAs crystals if the arsenic microcrystals are in the region in which the Ga ions are implanted. A wire-like shape free of As microcrystals then acts as a quantum wire for electrons or holes whereas a dot-like shape free of As microcrystals acts as a quantum dot. The co-existence of Ga ions and dopant ions, which provides conductivity type carriers opposite to the conductivity type of the majority carriers of a channel region of an FET, provides the fabrication of very narrow junction gate region for any FET.
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