公开(公告)号：EP1665344A4

公开(公告)日：2007-07-18

申请号：EP04784950

申请日：2004-09-24

Applicant: IBM

Inventor： GOODNOW KENNETH J ,  KAMPF FRANCIS A ,  NORMAN JASON M ,  VENTRONE SEBASTIAN T

IPC: G06F13/16 ,  G06F12/02

CPC classification number: G06F12/0284

Abstract: A structure and method of transferring data on a semiconductor device (2) having a plurality of systems (e.g. 6 and 3). Each system has at least one processing device (e.g. 7) and a local memory structure (e.g. 8). Each processing device is electrically coupled to each local memory structure within each system. Each local memory structure is electrically coupled to each of the other local memory structures. Each local memory structure is adapted to share address space with each of the processing devices. Each processing device is adapted to transmit data and instructions to each local memory structure.

公开(公告)号：WO2007139536A3

公开(公告)日：2009-05-07

申请号：PCT/US2006020462

申请日：2006-05-21

Applicant: IBM ,  COURCHESNE ADAM J ,  GOODNOW KENNETH J ,  HARDING W RIYON ,  MILTON DAVID W ,  NORMAN JASON M ,  OGILVIE CLARENCE R ,  ROTTELLA JASON E ,  SCHANELY PAUL M ,  VENTRONE SEBASTIAN T

Inventor： COURCHESNE ADAM J ,  GOODNOW KENNETH J ,  HARDING W RIYON ,  MILTON DAVID W ,  NORMAN JASON M ,  OGILVIE CLARENCE R ,  ROTTELLA JASON E ,  SCHANELY PAUL M ,  VENTRONE SEBASTIAN T

IPC: H04L12/50

CPC classification number: H04L49/15 ,  H04L49/109 ,  H04L49/252

Abstract: A method and apparatus for providing communication between various cores (1-5) located in an integrated circuit. The method and apparatus uses Hubs/Routers (6-10) to facilitate and manage communication of data from /between the cores (1-5) according to a specified methodology.

Abstract translation: 一种用于在位于集成电路中的各种核心（1-5）之间提供通信的方法和装置。 该方法和装置使用集线器/路由器（6-10）根据指定的方法来促进和管理/内核（1-5）之间的数据通信。

公开(公告)号：WO2005031804A3

公开(公告)日：2006-07-20

申请号：PCT/US2004031323

申请日：2004-09-24

Applicant: IBM ,  GOODNOW KENNETH J ,  KAMPF FRANCIS A ,  NORMAN JASON M ,  VENTRONE SEBASTIAN T

Inventor： GOODNOW KENNETH J ,  KAMPF FRANCIS A ,  NORMAN JASON M ,  VENTRONE SEBASTIAN T

IPC: G06F12/00 ,  G06F12/02 ,  G06F13/00 ,  G06F13/36

CPC classification number: G06F12/0284

Abstract: A structure and method of transferring data on a semiconductor device (2) having a plurality of systems (e.g. 6 and 3). Each system has at least one processing device (e.g. 7) and a local memory structure (e.g. 8). Each processing device is electrically coupled to each local memory structure within each system. Each local memory structure is electrically coupled to each of the other local memory structures. Each local memory structure is adapted to share address space with each of the processing devices. Each processing device is adapted to transmit data and instructions to each local memory structure.

Abstract translation: 在具有多个系统（例如6和3）的半导体器件（2）上传送数据的结构和方法。 每个系统具有至少一个处理设备（例如7）和本地存储器结构（例如8）。 每个处理设备电耦合到每个系统内的每个本地存储器结构。 每个本地存储器结构电耦合到每个其他本地存储器结构。 每个本地存储器结构适于与每个处理设备共享地址空间。 每个处理设备适于将数据和指令传送到每个本地存储器结构。

公开(公告)号：WO2005008742A3

公开(公告)日：2005-06-02

申请号：PCT/US2004022904

申请日：2004-07-15

Applicant: IBM ,  DOYLE GARY R ,  GOODNOW KENNETH J ,  HARDING RIYON W ,  KAMPF FRANCIS A ,  NORMAN JASON M ,  VENTRONE SEBASTIAN T

Inventor： DOYLE GARY R ,  GOODNOW KENNETH J ,  HARDING RIYON W ,  KAMPF FRANCIS A ,  NORMAN JASON M ,  VENTRONE SEBASTIAN T

IPC: G02B6/43 ,  G02B6/12

CPC classification number: G02B6/43

Abstract: Disclosed is an integrated circuit comprising a plurality of cores (50 A-B) attached to at least one transmitter (e.g. 20D) and receiver (e.g. 30D), an optical transmission network (e.g. 12A-B) embedded within the wire levels of the integrated circuit, and wherein the transmitter and receivers send and receive data on the network.

Abstract translation: 公开了一种集成电路，其包括附接到至少一个发射器（例如20D）和接收器（例如30D）的多个核（50AB），嵌入集成电路的线级内的光传输网络（例如12A-B） ，并且其中发射机和接收机在网络上发送和接收数据。

公开(公告)号：DE602004015125D1

公开(公告)日：2008-08-28

申请号：DE602004015125

申请日：2004-09-24

Applicant: IBM

Inventor： GOODNOW KENNETH J ,  KAMPF FRANCIS A ,  NORMAN JASON M ,  VENTRONE SEBASTIAN T

IPC: H01L21/00 ,  G06F12/02

Abstract: A structure and associated method of transfer data on a semiconductor device, comprising: a plurality of systems within the semiconductor device. Each system comprises at least one processing device and a local memory structure. Each processing device is electrically coupled to each local memory structure within each system. Each local memory structure is electrically coupled to each of the other said local memory structures. Each local memory structure is adapted to share address space with each of the processing devices. Each processing device is adapted to transmit data and instructions to each local memory structure.