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公开(公告)号：JP2002182810A
公开(公告)日：2002-06-28
申请号：JP2000370626
申请日：2000-12-05
Applicant: IBM
Inventor： OSHIKAWA HIROSHI , SHIMIZU MASAHIRO , YAMADA MITSUHARU , OMORI TADASHI
Abstract: PROBLEM TO BE SOLVED: To improve the reliability of data transfer by increasing timing margin without lowering data transfer speed. SOLUTION: The slew rate controller of a driver independently controls the slew rate of a data signal and the slew rate of a control signal of a strobe signal, etc., and the slew rate of the data signal is made smaller than the slew rate of the strobe signal. Namely, a waveform inclination in the transition time of the strobe signal is made larger than that of the data signal in a signal waveform.
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公开(公告)号：JP2000112776A
公开(公告)日：2000-04-21
申请号：JP27191298
申请日：1998-09-25
Applicant: IBM
Inventor： USHIO TERUHIKO , YAMADA MITSUHARU , KANAI TOSHIO , KUNIEDA EIJI
Abstract: PROBLEM TO BE SOLVED: To provide an error correction system which reduces a time needed for error correction processing in a form of product code and can improve use efficiency of a buffer storage device by efficiently performing data transfer. SOLUTION: This error correction system includes a formatter 20 for generating an ECC block which includes data arrayed in a matrix and at least a line error correction code for each line. A syndrome generator 38 is included between the formatter 20 and a first buffer storage device 22. The syndrome generator 38 generates a syndrome on the basis of each ECC block line from the formatter 20. An ECC block line and a related syndrome are stored in the first buffer storage device 22. Only the syndrome in the first buffer storage device 22 is transferred to a second buffer storage device 24 and an error correction code decoder 26. The first buffer storage device 22 stores data by a bank interleave system and the syndrome is stored at an empty position of the first buffer storage device 22.
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公开(公告)号：JPH08185271A
公开(公告)日：1996-07-16
申请号：JP32471594
申请日：1994-12-27
Applicant: IBM
Inventor： KIGAMI YUJI , YAMADA MITSUHARU , KANAI TOSHIO , ISHIBASHI KAZUYUKI
Abstract: PURPOSE: To efficiently and simply process the input/output of data at a high speed. CONSTITUTION: Request signals from a host computer 32 are inputted through the I/O 42 of an HDC 30 to a segment handier 36. The segment handier 36 refers to a segment table stored in a table memory 44, selects a segment, sets a segment memory 46 divided into the plural segments through a memory manager 38 and transfers the data to a disk part 11. In the segment handier 36, rules based on the principle of mutual exclusion are stored and determined beforehand and the data are held so as not to overlap the data of the same sector inside the segment memory 46 for the respective segments.
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公开(公告)号：JPH10283119A
公开(公告)日：1998-10-23
申请号：JP8984497
申请日：1997-04-09
Applicant: IBM JAPAN
Inventor： TAMURA TETSUYA , DEMURA MASAYUKI , ITAGAKI HIROSHI , YAMADA MITSUHARU
Abstract: PROBLEM TO BE SOLVED: To perform efficient data transfer for performing correction in real time by dynamically changing a transfer mode corresponding to the state of a decoder and adding one buffer constituted of plural banks further. SOLUTION: The transfer mode is dynamically changed corresponding to the state of the decoder and one buffer constituted of the two or more banks is newly added further. For instance, in a DVD reproduction system, signals read by a pickup are inputted to a DVD control block and sent to a decoding block 20. Data received in the decoding block 20 are error-corrected by the buffer, an MPU 20B and the decoder 20C provided inside the decoding block 20 connected by a common bus, decoded in real time and transmitted to a host side. In this case, in the decoding block 20, the buffer is constituted of a first buffer 20A-1 and a second buffer 20A-2. Then, the second buffer 20A-2 is provided with the two banks 26 and 28.
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