公开(公告)号：JP2005142562A

公开(公告)日：2005-06-02

申请号：JP2004319023

申请日：2004-11-02

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： PAUL S ANDREE ,  CASEY JON A ,  HORTON RAYMOND R ,  PATEL CHIRAQ S ,  SPROGIS EDMUND J ,  SUNDLOF BRIAN R

IPC: H01L23/12 ,  H01L21/48 ,  H01L21/60 ,  H01L21/76 ,  H01L23/14 ,  H01L25/04 ,  H01L25/18 ,  H05K3/34

CPC classification number: H01L21/486 ,  H01L23/147 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a method for filling a via within a wafer, particularly, for filling a blind via first, and various devices for carrying out the method. SOLUTION: The method includes a step for evacuating the via of air, a step for trapping at least a portion of a wafer and a paste with which to fill the via between two surfaces, and a step for filling the via by applying pressure to the paste. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种用于在晶片内填充通孔的方法，特别是用于首先填充盲孔，以及用于执行该方法的各种装置。 解决方案：该方法包括用于抽空空气通道的步骤，用于捕获至少一部分晶片和用于填充两个表面之间的通孔的浆料的步骤，以及通过施加填充通孔的步骤 对浆糊的压力。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2002280391A

公开(公告)日：2002-09-27

申请号：JP2002008478

申请日：2002-01-17

Applicant: IBM

Inventor： PAUL S ANDREE ,  FRANK R RIBUSHU ,  TSUJIMURA TAKATOSHI

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device, a thin-film transistor(TFT) and TFT manufacturing method. SOLUTION: The semiconductor device includes a top-gate type thin-film transistor(TFT) which is formed on a substrate 1. The top-gate type TFT comprises an insulation layer 3 deposited on the substrate 1, a source and drain electrodes 4, 5 of a metal - dopant compound deposited on the insulation layer 3, a polycrystalline Si(poly-Si) layer 6 deposited on the upsides of the insulation layer 3, the source and drain electrodes 4, 5, an Ohmic contact layer 7, formed by migration of the dopant from the metal - dopant compound between the metal - dopant compound and the poly-Si layer 6, a gate insulation layer 9 deposited on the poly-Si layer 6 and a gate electrode 10 formed on the gate insulation layer 9. The poly-Si layer 6 is crystallized by lateral crystallization due to the metal induction.

公开(公告)号：JP2003218498A

公开(公告)日：2003-07-31

申请号：JP2002290197

申请日：2002-10-02

Applicant: IBM

Inventor： PAUL S ANDREE ,  JOHN C FLAKE ,  MICHEL BRUNO ,  TSUJIMURA TAKATOSHI

IPC: G02F1/1343 ,  G09F9/00 ,  H01L21/02 ,  H01L21/28 ,  H01L21/288 ,  H01L21/768 ,  H01L51/50 ,  H05K3/18 ,  H05K3/38 ,  H05B33/14

Abstract: PROBLEM TO BE SOLVED: To provide a method of forming pattern, a semiconductor device and a metal conductive pattern. SOLUTION: A method of forming pattern includes the steps of: preparing a substrate; (202) forming an insulating layer having OH functional groups on a surface of the insulating layer; (203) forming a patterned polymer layer on the insulating layer; patterning the polymer layer by etching the insulating layer; exposing the insulating layer by peeling off (205) the polymer layer; and (207) selectively depositing conductive materials on the insulating layer. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2001148483A

公开(公告)日：2001-05-29

申请号：JP2000294866

申请日：2000-09-27

Applicant: IBM

Inventor： PAUL S ANDREE ,  FRANK R RIBUSHU

IPC: G02F1/136 ,  G02F1/1368 ,  H01L21/336 ,  H01L27/12 ,  H01L29/417 ,  H01L29/49 ,  H01L29/786 ,  H01L51/05 ,  H01L51/00

Abstract: PROBLEM TO BE SOLVED: To provide a self-matching thin film transistor structure and the manufacturing method. SOLUTION: A gate electrode layer formed on a substrate and an insulating layer formed on the gate electrode layer are included in a transistor. A first conductive layer forms a first part and a second part, which are isolated by a gap between them. The gap is formed in a position corresponding to a gate electrode in the gate electrode layer. A doping layer is formed on the first part and the second part of the first conductive layer and the source and the drain of the transistor are formed. In activating the gate electrode, the semiconductor layer is formed by being brought into contact with the insulating layer on the first and the second doping layers and in the gap, so that current can flow directly between the first and the second portions of the first conductive layer across the gap.

公开(公告)号：JP2001127307A

公开(公告)日：2001-05-11

申请号：JP2000280298

申请日：2000-09-14

Applicant: IBM

Inventor： PAUL S ANDREE ,  FRANK R RIBUSHU

IPC: H01L21/28 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  H01L29/423 ,  H01L29/43 ,  H01L29/49 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method for TFT by utilizing a single lithography step to suppress the time and cost for manufacturing a self-matching device to minimum. SOLUTION: A semi-transparent gate electrode 10 is formed on a substrate 12, over which a first dielectrics layer 14, semiconductor layer 16, and second dielectrics layer 19 are allowed to stick, and a photoresist is allowed to stick on it. The photoresist is exposed from the rear surface with the gate electrode 10 as a mask for patterning, which is used as a mask for etching the second dielectrics layer 19. Then the photoresist is removed and a doped semiconductor layer 24 and conductive layer 28 are allowed to stick on the semiconductor layer 16 and dielectrics layer 19, which are patterned to provide source electrode and drain electrode 42 and 44.