公开(公告)号：DE3682043D1

公开(公告)日：1991-11-21

申请号：DE3682043

申请日：1986-12-02

Applicant: IBM

Inventor： BERANGER LEONARD HERVE ,  GAUDENZI GENE JOSEPH ,  REEDY DENNIS CONWAY ,  SCHETTLER HELMUT

IPC: H03K19/0175 ,  H03K17/16 ,  H03K19/003 ,  H03K19/018 ,  H03K19/0185 ,  H03K19/088 ,  H03K5/02

Abstract: A small signal swing line driver (100), that generates a reduced amount of switching noise and also suppresses transients appearing on the line, is described. Specifically, the driver (100) includes a clamp (200) connected to the driver output to limit the maximum DC driver output level and to suppress voltage transients, e.g. reflections, spikes or the like, appearing on the driven line and caused by conditions external to the driver (100). The driver (100) also contains circuitry to limit the transition times of the rising and falling edges of the driver output signal in order to reduce the amount of switching noise which is generated by the driver (100) and thereafter coupled onto quiet lines.

公开(公告)号：CH620556A5

公开(公告)日：1980-11-28

申请号：CH841677

申请日：1977-07-07

Applicant: IBM

Inventor： REEDY DENNIS CONWAY

IPC: H03K19/088 ,  H03K19/003

Abstract: Disclosed is a transistor-transistor-logic (TTL) circuit which is testable by D. C. Testing Techniques. The improvement includes a high impedance network for providing sufficient base drive to drive the output transistor into conduction when the malfunctioning input transistor fails to provide a turn-off logic level. The high impedance network can be a Schottky barrier diode and an epitaxial resistor connected in a series path between a potential supply and the base region of the output transistor.

公开(公告)号：DE3478731D1

公开(公告)日：1989-07-20

申请号：DE3478731

申请日：1984-07-11

Applicant: IBM

Inventor： GAUDENZI GENE JOSEPH ,  NORSWORTHY JOHN PAUL ,  PHAN NGHIA VAN ,  REEDY DENNIS CONWAY

IPC: H03K5/02 ,  H03K17/04 ,  H03K17/60 ,  H03K17/615 ,  H03K19/088 ,  H03K19/092

Abstract: Power dissipation in an off-chip driver circuit is decreased by utilizing a selectively switched transistor to discharge the base of the output pull-down transistor, and by using a large resistance in the base current path for the first stage of the Darlington pull-up transistors. An additional transistor having a larger emitter area and coupled to a lower potential source is connected in parallel with the normal phase-splitter transistor to provide additional output current sinking capability, and a current mirror is connected to control the current through both the phase splitting transistor and the additional transistor to control the turn-on transition of the pull-down output transistor.

公开(公告)号：DE2736324A1

公开(公告)日：1978-03-09

申请号：DE2736324

申请日：1977-08-12

Applicant: IBM

Inventor： REEDY DENNIS CONWAY

IPC: H03K19/088 ,  H03K19/08

Abstract: Disclosed is a transistor-transistor-logic (TTL) circuit which is testable by D. C. Testing Techniques. The improvement includes a high impedance network for providing sufficient base drive to drive the output transistor into conduction when the malfunctioning input transistor fails to provide a turn-off logic level. The high impedance network can be a Schottky barrier diode and an epitaxial resistor connected in a series path between a potential supply and the base region of the output transistor.