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公开(公告)号:JPH10241399A
公开(公告)日:1998-09-11
申请号:JP3608898
申请日:1998-02-18
Applicant: IBM
Inventor: KALTER HOWARD L , JOHN EDWARD BASS JR , JEFFREY HARRIS DOREIBERUBISU , REX NUGO KOO , MORI YOTARO , JOHN STEWART PARENTEU JR , DONALD LAURENCE WEETER
Abstract: PROBLEM TO BE SOLVED: To provide a built-in self test BIST macro of a processor base for testing a dynamic random access memory(DRAM) built in a logic chip. SOLUTION: A BIST macro 200 is provided with two ROMs in a sequencer 205, a first ROM is made a ROM for storing a test instruction, a second ROM is made a ROM for scanning, so as to perform sequencing of a test instruction stored in the first ROM as well as a branching function and a loop function. Further, the BIST macro 200 monitors obstacle in a DRAM, and is provided with a redundant allotting logic section 260 for exchanging an obstacle word line or a data line, or the both.
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公开(公告)号:JPH11213700A
公开(公告)日:1999-08-06
申请号:JP1657598
申请日:1998-01-29
Applicant: IBM
Inventor: KALTER HOWARD L , JOHN EDWARD BASS JR , JEFFREY HARRIS DOREIBERUBISU , REX NUGO KOO , MORI YOTARO , JOHN STEWART PARENTEU JR , DONALD LAURENCE WEETER
Abstract: PROBLEM TO BE SOLVED: To provide a built-in self inspection(BIST) for a processor base for testing a dynamic random access memory(DRAM) built in a logic chip. SOLUTION: A BIST 200 has two ROMs(read only memories) in a sequencer 205. One is to store test commands and the other is a ROM that can be scanned and provides not only a branch function and a loop function, but sequencing of test commands stored in the first ROM. A BIST macro has further a redundant allocation logic section 260 which monitors faults in a DRAM and exchanges a fault word line or a fault data line or both lines.
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