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公开(公告)号:JP2002261599A
公开(公告)日:2002-09-13
申请号:JP2001368652
申请日:2001-12-03
Applicant: IBM
Inventor: ANAND DARREN L , JOHN EDWARD BASS JR , FIFIELD JOHN ATKINSON , GILLIS PAMELA SUE , JAKOBSEN PETER O , KEMERER DOUGLAS WAYNE , LACKEY DAVID E , OAKLAND STEVEN FREDERICK , OUELLETTE MICHAEL RICHARD , TONTI WILLIAM R
IPC: H01L21/82 , G11C7/00 , G11C29/00 , G11C29/04 , H03K19/173
Abstract: PROBLEM TO BE SOLVED: To provide a method and a device for a fuse programming integrated circuit in which fuses are used in common by redundant elements. SOLUTION: A method and a device for initializing an integrated circuit by the use of the compressed data from a remote fuse box are capable of reducing fuses in number required for repairing or customizing the integrated circuit, and grouping the fuses outside macros which are repaired by the fuses. The remote position of the fuses improves the arrangement of the macros, having redundant repairing performances in flexibility and enables the fuses to be properly grouped for facilitating the usability of programming and the layout of circuits. The fuses are formed into columns and rows, to represent control words and run-length compressed data and to provide more repairing points per fuse. The data are loaded into a shift register in series and shifted to macro positions, for controlling the selection of redundant circuits, so that defective integrated circuits can be repaired, and the logic is customized.
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公开(公告)号:JPH11213700A
公开(公告)日:1999-08-06
申请号:JP1657598
申请日:1998-01-29
Applicant: IBM
Inventor: KALTER HOWARD L , JOHN EDWARD BASS JR , JEFFREY HARRIS DOREIBERUBISU , REX NUGO KOO , MORI YOTARO , JOHN STEWART PARENTEU JR , DONALD LAURENCE WEETER
Abstract: PROBLEM TO BE SOLVED: To provide a built-in self inspection(BIST) for a processor base for testing a dynamic random access memory(DRAM) built in a logic chip. SOLUTION: A BIST 200 has two ROMs(read only memories) in a sequencer 205. One is to store test commands and the other is a ROM that can be scanned and provides not only a branch function and a loop function, but sequencing of test commands stored in the first ROM. A BIST macro has further a redundant allocation logic section 260 which monitors faults in a DRAM and exchanges a fault word line or a fault data line or both lines.
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公开(公告)号:JPH10241399A
公开(公告)日:1998-09-11
申请号:JP3608898
申请日:1998-02-18
Applicant: IBM
Inventor: KALTER HOWARD L , JOHN EDWARD BASS JR , JEFFREY HARRIS DOREIBERUBISU , REX NUGO KOO , MORI YOTARO , JOHN STEWART PARENTEU JR , DONALD LAURENCE WEETER
Abstract: PROBLEM TO BE SOLVED: To provide a built-in self test BIST macro of a processor base for testing a dynamic random access memory(DRAM) built in a logic chip. SOLUTION: A BIST macro 200 is provided with two ROMs in a sequencer 205, a first ROM is made a ROM for storing a test instruction, a second ROM is made a ROM for scanning, so as to perform sequencing of a test instruction stored in the first ROM as well as a branching function and a loop function. Further, the BIST macro 200 monitors obstacle in a DRAM, and is provided with a redundant allotting logic section 260 for exchanging an obstacle word line or a data line, or the both.
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公开(公告)号:JPH1069058A
公开(公告)日:1998-03-10
申请号:JP12729397
申请日:1997-05-16
Applicant: IBM
Inventor: LARS WOLFGANG RIIBUMAN , ROBERT THOMAS SEIYER , JOHN EDWARD BASS JR
IPC: G03F1/00 , G03F1/36 , G03F7/20 , H01L21/027 , G03F1/08
Abstract: PROBLEM TO BE SOLVED: To improve the efficiency and accuracy of optical proximity correction by sorting associated edge parts by a predetermined proximity characteristic and forming correction shapes along associated shape edges. SOLUTION: Levels of design data sets including electrical function elements, such as polysilicon gates 14, 16, 18, 20, 22, are selected and inputted. Next, the data sets are sorted to the levels requiring the proximity correction and the levels contributing to the proximity effect but not requiring the proximity correction. The levels requiring the proximity correction are gathered and edge projections 14A, 16A, 18A, 20A, 22A of the first set are formed. The edge projections of the first set are intersected with the design levels to determine the electrical function parameters and the common parts therebetween are gathered. Next, the common parts are sorted by their proximity correction characteristics and the sorted common parts are fabricated within the final proximity correction photomask shapes.
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