公开(公告)号：JP2001290762A

公开(公告)日：2001-10-19

申请号：JP2001073048

申请日：2001-03-14

Applicant: IBM

Inventor： ERIC M FOSTER ,  STEVEN B HERNDON ,  ERIC E LETTER ,  RONALD S SVECK

IPC: G06F13/362 ,  G06F13/00 ,  G09G1/16 ,  G09G5/00

Abstract: PROBLEM TO BE SOLVED: To provide a method and a structure for dynamically blocking access of a request signal to a shared bus. SOLUTION: The shared bus manages a request for access to an address space. A nonreal time master and a real time master compete about their requests for address space access by presenting the address access requests to the shared bus. An access dynamic block by R with respect to the shared bus is accomplished by using a request limiter. The request limiter is a device connected to a real time clock and uses algorithm for deciding a time when the access of R to the shared bus is made performable or nullified. The algorithm uses a window scheme that allows the access of R to the shared bus every N-th clock cycle. Here, the value of an integer N can be supplied to the request limiter by the real time master.

公开(公告)号：JP2000004443A

公开(公告)日：2000-01-07

申请号：JP7558099

申请日：1999-03-19

Applicant: IBM

Inventor： ERIC M FOSTER ,  LEE WILLIAM R ,  RONALD S SVECK

IPC: H04N7/32 ,  G06F12/02 ,  H04J3/00 ,  H04J3/06

Abstract: PROBLEM TO BE SOLVED: To provide separate system time clock (STC) registers, which can be independently updated, by executing any one of the independent update and synchronous update of first and second count values in first and second counter registers corresponding to first and second address values. SOLUTION: When the address values of ADDR-VID register 501 and an ADDR-AUD register 511 are different, a host controller separately writes updating in an STC-VID register and an STC-AUD register. By making equal the address values of the ADDR-VID register 501 and ADDR-AUD register 511, one STC value is simultaneously written in both the STC-VID register 500 and the STC-AUD register 510. Further, by writing the different address value in any one of the ADDR-VID register 501 and ADDR-AUD register 511 after synchronizing both the registers 500 and 510, the independence of counters is recovered.