DIGITAL SYSTEM AND METHOD
    1.
    发明专利

    公开(公告)号:JP2001290762A

    公开(公告)日:2001-10-19

    申请号:JP2001073048

    申请日:2001-03-14

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide a method and a structure for dynamically blocking access of a request signal to a shared bus. SOLUTION: The shared bus manages a request for access to an address space. A nonreal time master and a real time master compete about their requests for address space access by presenting the address access requests to the shared bus. An access dynamic block by R with respect to the shared bus is accomplished by using a request limiter. The request limiter is a device connected to a real time clock and uses algorithm for deciding a time when the access of R to the shared bus is made performable or nullified. The algorithm uses a window scheme that allows the access of R to the shared bus every N-th clock cycle. Here, the value of an integer N can be supplied to the request limiter by the real time master.

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