公开(公告)号：DE3280160D1

公开(公告)日：1990-05-31

申请号：DE3280160

申请日：1982-12-02

Applicant: IBM

Inventor： BOND GEORGE LEROY ,  SATYA AKELLA VENKATA SURYA

IPC: G06F12/16 ,  G06F11/16 ,  G11C29/00 ,  G11C29/42 ,  G06F11/20

Abstract: A memory system is provided with a simple flexible control arrangement for assigning locations in an alternate memory as replacements for previously identified defective fault areas in main memory (30). The assignment of the replacement locations in the alternate memory is made on a selective basis taking into consideration the defect status of other failure independent bit positions of a data word and the power of the ECC code which is used in connection with the memory system. A relatively small writable index, which is addressed by a subset of the main memory address signals, provides a partial address and control fields to the alternate memory in accordance with control data transferred from the host system. Control data is developed by the host system each time it is powered on and is based on identifying each defective location in main memory through a diagnostic routine and analyzing the defect distribution in a way to provide control signals which minimize the number of replacements that are assigned and maximize the number of data words that can be transferred from the memory system to the host system before an uncorrectable error is encountered by the ECC system.

公开(公告)号：DE2803732A1

公开(公告)日：1978-09-14

申请号：DE2803732

申请日：1978-01-28

Applicant: IBM

Inventor： CASOWITZ BARRY NORMAN ,  COWAN MICHAEL DAVID ,  HUMPHREYS CHARLES BRUCE ,  SATYA AKELLA VENKATA SURYA

IPC: G01R31/26 ,  G01R31/28 ,  H01L21/22 ,  H01L21/66

Abstract: An electrical defect density monitor for semiconductor device fabrication utilizing a silicide of a formed transitional metal (such as platinum silicide) on a surface of a silicon substrate as a resistor in parallel with the resistance of the underlying substrate, including diffused regions, to improve measurement sensitivity of high sheet resistivity areas. The measurement can be employed for measuring the integrity of diffused regions and/or of dielectric coatings.

公开(公告)号：DE3371440D1

公开(公告)日：1987-06-11

申请号：DE3371440

申请日：1983-11-03

Applicant: IBM

Inventor： MAGDO STEVEN ,  SATYA AKELLA VENKATA SURYA

IPC: H01L21/66 ,  H01L21/82 ,  H01L23/544

公开(公告)号：DE2962616D1

公开(公告)日：1982-06-09

申请号：DE2962616

申请日：1979-06-11

Applicant: IBM

Inventor： KELLY HELEN JANET ,  PERLMAN DAVID JACOB ,  SATYA AKELLA VENKATA SURYA

IPC: G01R31/26 ,  G01R31/3185 ,  G11C29/00 ,  H01L21/339 ,  H01L21/66 ,  H01L27/105 ,  H01L29/762 ,  G01R31/28 ,  G11C19/28 ,  H01L27/10

公开(公告)号：DE2728052A1

公开(公告)日：1978-01-12

申请号：DE2728052

申请日：1977-06-22

Applicant: IBM DEUTSCHLAND

Inventor： LEE JAMES HSI-TANG ,  LESSMANN BERND KURT SIEGFRIED ,  SATYA AKELLA VENKATA SURYA

IPC: H01L21/822 ,  G01R31/28 ,  H01L21/331 ,  H01L21/66 ,  H01L23/544 ,  H01L27/04 ,  H01L29/73 ,  H01L21/70

Abstract: A complex test structure for integrated, semiconductor circuits in which the impurity regions of the test device are elongated, preferably in serpentine fashion. The elongated impurity regions emulate corresponding regions in regular integrated circuit devices. Additional regions are provided, each in elongated form, which, when impressed with appropriate voltages or currents, provide indications of defect levels and product yield in the regular devices. Advantageously, the serpentine test structure is fabricated on the same wafer and with the same process steps as the regular integrated circuit chips. In one embodiment, a plurality of such monitors are provided adjacent each other in the same test site. Regions in one monitor are selectively connected to regions in another monitor and to external contact pads by contact stations disposed between each monitor.