公开(公告)号：GB2610332B

公开(公告)日：2024-12-04

申请号：GB202216836

申请日：2021-03-01

Applicant: IBM

Inventor： SEYOUNG KIM ,  MINGU KANG ,  KYUHYOUN KIM ,  SEONGHOON WOO

IPC: G11C27/02 ,  G06F7/523 ,  G06N3/06 ,  G06N3/065 ,  H03K19/02 ,  H03M1/66

Abstract: A differential mixed-signal logic processor is provided. The differential mixed-signal logic processor includes a plurality of mixed-signal multiplier branches for multiplication of an analog value A and a N-bit digital value B. Each of the plurality of mixed-signal multiplier branches include a first capacitor connected across a second capacitor and a third capacitor to provide a differential output across the second and third capacitors. A capacitance of the first capacitor is equal to half a capacitance of the second and third capacitors.

公开(公告)号：GB2608307A

公开(公告)日：2022-12-28

申请号：GB202213043

申请日：2021-01-14

Applicant: IBM

Inventor： SEONGHOON WOO ,  MATTHIAS GEORG GOTTWALD

IPC: H01L27/22

Abstract: A top pinned magnetic tunnel junction (MTJ) stack containing a magnetic pinned layered structure including a second magnetic pinned layer having strong perpendicular magnetic anisotropy (PMA) is provided. The magnetic pinned layered structure includes a crystal grain growth controlling layer located between a first magnetic pinned layer having a body centered cubic (BCC) texture and the second magnetic pinned layer. The presence of the crystal grain growth controlling layer facilitates formation of a second magnetic pinned layer having a face centered cubic (FCC) texture or a hexagonal closed packing (HCP) texture which, in turn, promotes strong PMA to the second magnetic pinned layer of the magnetic pinned layered structure.