公开(公告)号：JPS52119829A

公开(公告)日：1977-10-07

申请号：JP1940577

申请日：1977-02-25

Applicant: IBM

Inventor： SHIN SAN RII

IPC: G11C11/56 ,  G11C11/35 ,  G11C11/403 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

公开(公告)号：JPS52119876A

公开(公告)日：1977-10-07

申请号：JP1940677

申请日：1977-02-25

Applicant: IBM

Inventor： SHIN SAN RII ,  NOOBAATO JIYOOJI BOGURU JIYUNI

IPC: G11C11/405 ,  G11C11/24 ,  G11C11/35 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

公开(公告)号：JPH0613583A

公开(公告)日：1994-01-21

申请号：JP3189093

申请日：1993-02-22

Applicant: IBM

Inventor： ARUBAATO SUTEIIBUN BERUGENDAAR ,  KUROODO RUI BERUTAN ,  JIYON EDOWAADO KUROONIN ,  HAWAADO REO KARUTAA ,  DONARUDO MAKARUPAIN KENII ,  CHIYUN HON RAMU ,  SHIN SAN RII

IPC: H01L27/10 ,  H01L21/8239 ,  H01L21/8242 ,  H01L21/8247 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: PURPOSE: To provide a shadow RAM, which occupies only 120% or less of the space of only a DRAM by using an EEPROM in a trench in the array of the DRAM. CONSTITUTION: A memory capacitor 3 of the deep trench of polysilicon is arranged between a word line 1 and a bit line, where its contact 2 is shown. An insulating region 4 of a shallow trench is located between a pair of the deep-trench memory capacitors 3 neighboring the contact 2 and blocks stray surface currents. An EEPROM trench includes a series of discontinuous polysilicon floating gates 5, a continuous polysilicon recall-gate extending part 6, a continuous polysilicon program gate, a silicon oxide layer 8 for insulation and a dielectric spacer 7 having abundant silicon between the floating gate 5 and the recall-gate extending part 6, and between the floating gate and the program gate.