公开(公告)号：DE3368447D1

公开(公告)日：1987-01-29

申请号：DE3368447

申请日：1983-03-15

Applicant: IBM

Inventor： KUMAR ANANDA HOSAKERE ,  SRIKRISHNAN KRIS VENKATRAMAN

IPC: B23K35/00 ,  C04B41/51 ,  C04B41/88 ,  H01L21/48 ,  H01L21/768 ,  H05K3/04 ,  H05K3/14 ,  H05K3/24 ,  C23C14/04 ,  C23C26/00

公开(公告)号：DE3276277D1

公开(公告)日：1987-06-11

申请号：DE3276277

申请日：1982-08-10

Applicant: IBM

Inventor： HOWARD JAMES KENT ,  SRIKRISHNAN KRIS VENKATRAMAN

IPC: H01L27/04 ,  H01G4/005 ,  H01G4/008 ,  H01G4/08 ,  H01G4/33 ,  H01L21/28 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/01 ,  H01L27/105 ,  H01L27/108 ,  H01L29/43 ,  H01L29/92 ,  H01G1/01

公开(公告)号：DE69529775D1

公开(公告)日：2003-04-03

申请号：DE69529775

申请日：1995-07-05

Applicant: IBM

Inventor： JOSHI RAJIV VASANT ,  TEJWANI MANU JAMNADAS ,  SRIKRISHNAN KRIS VENKATRAMAN

IPC: H01L21/28 ,  H01L21/203 ,  H01L21/205 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532

Abstract: A structure and method for fabricating circuits which use field effect transistors (FETs), bipolar transistors, or BiCMOS (combined Bipolar/Complementary Metal Oxide Silicon structures), uses low temperature germanium gas flow to affect metals and alloys deposited in high aspect ratio structures including lines and vias. By using a germanium gas flow, germanium (Ge) will be introduced in a surface reaction which prevents voids and side seams and which also provides a passivating layer of CuGe. If a hard cap is needed for surface passivation or a wear-resistance application, the GeH4 gas followed by WF6 can be used to produce an in-situ hard cap of WxGey. Further, high aspect ratio vias/lines (aspect ratio of 3 or more) can be filled by utilizing low pressures and high temperatures (i.e., below 450 DEG C) without degrading the underlying metals.

公开(公告)号：AU608042B2

公开(公告)日：1991-03-21

申请号：AU2096288

申请日：1988-08-11

Applicant: IBM

Inventor： GAJDA JOSEPH JOHN ,  SRIKRISHNAN KRIS VENKATRAMAN ,  TOTTA PAUL ANTHONY ,  TRUDEAU FRANCIS GEORGE

IPC: H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/52 ,  H01L23/54

公开(公告)号：DE69529775T2

公开(公告)日：2003-10-16

申请号：DE69529775

申请日：1995-07-05

Applicant: IBM

Inventor： JOSHI RAJIV VASANT ,  TEJWANI MANU JAMNADAS ,  SRIKRISHNAN KRIS VENKATRAMAN

IPC: H01L21/28 ,  H01L21/203 ,  H01L21/205 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532

Abstract: A structure and method for fabricating circuits which use field effect transistors (FETs), bipolar transistors, or BiCMOS (combined Bipolar/Complementary Metal Oxide Silicon structures), uses low temperature germanium gas flow to affect metals and alloys deposited in high aspect ratio structures including lines and vias. By using a germanium gas flow, germanium (Ge) will be introduced in a surface reaction which prevents voids and side seams and which also provides a passivating layer of CuGe. If a hard cap is needed for surface passivation or a wear-resistance application, the GeH4 gas followed by WF6 can be used to produce an in-situ hard cap of WxGey. Further, high aspect ratio vias/lines (aspect ratio of 3 or more) can be filled by utilizing low pressures and high temperatures (i.e., below 450 DEG C) without degrading the underlying metals.

公开(公告)号：DE69513459T2

公开(公告)日：2000-10-26

申请号：DE69513459

申请日：1995-07-05

Applicant: IBM

Inventor： JOSHI RAJIV VASANT ,  TEJWANI MANU JAMNADAS ,  SRIKRISHNAN KRIS VENKATRAMAN

IPC: H01L21/28 ,  H01L21/203 ,  H01L21/205 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532

Abstract: A structure and method for fabricating circuits which use field effect transistors (FETs), bipolar transistors, or BiCMOS (combined Bipolar/Complementary Metal Oxide Silicon structures), uses low temperature germanium gas flow to affect metals and alloys deposited in high aspect ratio structures including lines and vias. By using a germanium gas flow, germanium (Ge) will be introduced in a surface reaction which prevents voids and side seams and which also provides a passivating layer of CuGe. If a hard cap is needed for surface passivation or a wear-resistance application, the GeH4 gas followed by WF6 can be used to produce an in-situ hard cap of WxGey. Further, high aspect ratio vias/lines (aspect ratio of 3 or more) can be filled by utilizing low pressures and high temperatures (i.e., below 450 DEG C) without degrading the underlying metals.

公开(公告)号：DE69513459D1

公开(公告)日：1999-12-30

申请号：DE69513459

申请日：1995-07-05

Applicant: IBM

Inventor： JOSHI RAJIV VASANT ,  TEJWANI MANU JAMNADAS ,  SRIKRISHNAN KRIS VENKATRAMAN

IPC: H01L21/28 ,  H01L21/203 ,  H01L21/205 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532

Abstract: A structure and method for fabricating circuits which use field effect transistors (FETs), bipolar transistors, or BiCMOS (combined Bipolar/Complementary Metal Oxide Silicon structures), uses low temperature germanium gas flow to affect metals and alloys deposited in high aspect ratio structures including lines and vias. By using a germanium gas flow, germanium (Ge) will be introduced in a surface reaction which prevents voids and side seams and which also provides a passivating layer of CuGe. If a hard cap is needed for surface passivation or a wear-resistance application, the GeH4 gas followed by WF6 can be used to produce an in-situ hard cap of WxGey. Further, high aspect ratio vias/lines (aspect ratio of 3 or more) can be filled by utilizing low pressures and high temperatures (i.e., below 450 DEG C) without degrading the underlying metals.