CAPACITOR STRUCTURE AND ITS MANUFACTURING METHOD

    公开(公告)号:JP2001313372A

    公开(公告)日:2001-11-09

    申请号:JP2001090567

    申请日:2001-03-27

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide a highly reliable chip-on-capacitor. SOLUTION: The capacitor (94) in a semiconductor device (20) has a lower copper plate (30) in a damascene/trench (22), barrier layers (56, 180a) disposed above the lower plate, a dielectric layer (60) disposed above the barrier layers and an upper plate (96) above the dielectric layer. Another embodiment of this invention is capacitors (296, 396) in a semiconductor device, which has two lower plates (230, 231, 330, 331) mutually separated, dielectric layers (260, 360) above the lower plate and upper plates (296, 396) above the dielectric layer which covers the lower plate, extends preferably across it. This invention further includes a method for manufacturing the capacitor of such a constitution.

    CAPACITOR STRUCTURE AND ITS MANUFACTURING METHOD

    公开(公告)号:JP2001313373A

    公开(公告)日:2001-11-09

    申请号:JP2001098235

    申请日:2001-03-30

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide a metal capacitor installed on a chip. SOLUTION: Capacitors (60, 126) manufactured on a semiconductor chip have strap/contacts (41A, 119A), which mutually connect bottom plates (41B, 111A) of a capacitor to a chip circuit. In one version, an extension part of a material, constituting a bottom plate of a capacitor forms a strap contact. In the other version, a capacitor (185) comprises a folded bottom plate, which uses an available space and therefore increases its capacitance, a dielectric layer and a top plate. By means of a plurality of manufacturing methods, manufacturing of these capacitors of various versions can be incorporated in a standard dual or single-damascene manufacturing process, including a copper damascene process.

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