公开(公告)号：CA1019466A

公开(公告)日：1977-10-18

申请号：CA213807

申请日：1974-11-15

Applicant: IBM

Inventor： BAKER THEODORE H ,  STEVENS RICHARD C ,  TZOU ALBERT J

IPC: H01L21/66 ,  G01R27/02 ,  G01R31/26 ,  H01L21/027 ,  H01L21/28

公开(公告)号：FR2328285A1

公开(公告)日：1977-05-13

申请号：FR7626314

申请日：1976-08-25

Applicant: IBM

Inventor： BAKER THEODORE H ,  GHAFGHAICHI MAJID ,  STEVENS RICHARD C ,  WIMPFHEIMER HANS

IPC: H01L21/3213 ,  H01L21/302 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/3205 ,  H01L21/314 ,  H01L21/94

Abstract: A method of planarizing an electrically insulative layer formed over a non-planar integrated circuit substrate having raised portions. After the electrically insulative layers are deposited over such substrate, the layer has elevations corresponding to the underlying raised portions of the substrate. A masking layer is formed on the electrically insulative layer having at least one opening therethrough coincident with an elevation in the insulative layer; this opening has smaller lateral dimensions than the coincident elevation, thereby facilitating alignment. The elevation in the insulative layer exposed in said at least one opening is then etched to the level of the unelevated portion of the layer, and the insulative layer is then resputtered for a period of time sufficient to planarize the remainder of such etched elevation to the level of the unelevated portions.

公开(公告)号：CA1067038A

公开(公告)日：1979-11-27

申请号：CA263201

申请日：1976-10-08

Applicant: IBM

Inventor： BAKER THEODORE H ,  GHAFGHAICHI MAJID ,  STEVENS RICHARD C ,  WIMPFHEIMER HANS

IPC: H01L21/3213 ,  H01L21/302 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/3205 ,  C23C15/00

Abstract: PLANARIZING INSULATIVE LAYERS BY RESPUTTERING A method of planarizing an electrically insulative layer formed over a non-planar integrated circuit substrate having raised portions. After the electrically insulative layers are deposited over such substrate, the layer has elevations corresponding to the underlying raised portions of the substrate. A masking layer is formed on the electrically insulative layer having at least one opening therethrough coincident with an elevation in the insulative layer; this opening has smaller lateral dimensions than the coincident elevation, thereby facilitating alignment. The elevation in the insulative layer exposed in said at least one opening is then etched to the level of the unelevated portion of the layer, and the insulative layer is then resputtered for a period of time sufficient to planarize the remainder of such etched elevation to the level of the unelevated portions.