公开(公告)号：DE2636971A1

公开(公告)日：1977-04-28

申请号：DE2636971

申请日：1976-08-17

Applicant: IBM

Inventor： BAKER THEODORE HARRIS ,  GHAFGHAICHI MAJID ,  STEVENS RICHARD CHARLES ,  WIMPFHEIMER HANS

IPC: H01L21/3213 ,  H01L21/302 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/3205 ,  H01L21/82

Abstract: A method of planarizing an electrically insulative layer formed over a non-planar integrated circuit substrate having raised portions. After the electrically insulative layers are deposited over such substrate, the layer has elevations corresponding to the underlying raised portions of the substrate. A masking layer is formed on the electrically insulative layer having at least one opening therethrough coincident with an elevation in the insulative layer; this opening has smaller lateral dimensions than the coincident elevation, thereby facilitating alignment. The elevation in the insulative layer exposed in said at least one opening is then etched to the level of the unelevated portion of the layer, and the insulative layer is then resputtered for a period of time sufficient to planarize the remainder of such etched elevation to the level of the unelevated portions.

公开(公告)号：DE2860169D1

公开(公告)日：1980-12-18

申请号：DE2860169

申请日：1978-07-27

Applicant: IBM

Inventor： DALAL HORMAZDYAR MINOCHER ,  GHAFGHAICHI MAJID ,  KASPRZAK LUCIAN ALEXANDER ,  WIMPFHEIMER HANS

IPC: H01L21/768 ,  H01L21/28 ,  H01L21/285 ,  H01L21/338 ,  H01L21/60 ,  H01L23/532 ,  H01L29/43 ,  H01L29/45 ,  H01L29/47 ,  H01L29/872 ,  H01L29/40 ,  H01L23/48

Abstract: A silicon semiconductor device having contacts which include tantalum. The tantalum is useful in particular for fabricating Schottky barrier diodes having a low barrier height. The method includes: precleaning the silicon substrate prior to depositing the tantalum; depositing the tantalum at low pressure and low substrate temperature to avoid oxidation of the tantalum; and sintering the contact to reduce any interfacial charges and films remaining between the silicon and tantalum. When a metal which reacts with silicon during processing, such as aluminum, is used as interconnection metallurgy, a layer of chrome must be deposited between the tantalum and aluminum.

公开(公告)号：CA1067038A

公开(公告)日：1979-11-27

申请号：CA263201

申请日：1976-10-08

Applicant: IBM

Inventor： BAKER THEODORE H ,  GHAFGHAICHI MAJID ,  STEVENS RICHARD C ,  WIMPFHEIMER HANS

IPC: H01L21/3213 ,  H01L21/302 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/3205 ,  C23C15/00

Abstract: PLANARIZING INSULATIVE LAYERS BY RESPUTTERING A method of planarizing an electrically insulative layer formed over a non-planar integrated circuit substrate having raised portions. After the electrically insulative layers are deposited over such substrate, the layer has elevations corresponding to the underlying raised portions of the substrate. A masking layer is formed on the electrically insulative layer having at least one opening therethrough coincident with an elevation in the insulative layer; this opening has smaller lateral dimensions than the coincident elevation, thereby facilitating alignment. The elevation in the insulative layer exposed in said at least one opening is then etched to the level of the unelevated portion of the layer, and the insulative layer is then resputtered for a period of time sufficient to planarize the remainder of such etched elevation to the level of the unelevated portions.

公开(公告)号：CA1111570A

公开(公告)日：1981-10-27

申请号：CA307591

申请日：1978-07-18

Applicant: IBM

Inventor： DALAL HORMAZDYAR M ,  GHAFGHAICHI MAJID ,  KASPRZAK LUCIAN A ,  WIMPFHEIMER HANS

IPC: H01L21/768 ,  H01L21/28 ,  H01L21/285 ,  H01L21/338 ,  H01L21/60 ,  H01L23/532 ,  H01L29/43 ,  H01L29/45 ,  H01L29/47 ,  H01L29/872 ,  H01L29/18

Abstract: TANTALUM SEMICONDUCTOR CONTACTS AND METHOD FOR FABRICATING SAME A silicon semiconductor device having contacts which include tantalum. The tantalum is useful in particular for fabricating Schottky barrier diodes having a low barrier height. The method includes: precleaning the silicon substrate prior to depositing the tantalum; depositing the tantalum at low pressure and low substrate temperature to avoid oxidation of the tantalum; and sintering the contact to reduce any interfacial charges and films remaining between the silicon and tantalum. When a metal which reacts with silicon during processing, such as aluminum, is used as interconnection metallurgy, a layer of chrome must be deposited between the tantalum and aluminum.

公开(公告)号：FR2328285A1

公开(公告)日：1977-05-13

申请号：FR7626314

申请日：1976-08-25

Applicant: IBM

Inventor： BAKER THEODORE H ,  GHAFGHAICHI MAJID ,  STEVENS RICHARD C ,  WIMPFHEIMER HANS

IPC: H01L21/3213 ,  H01L21/302 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/3205 ,  H01L21/314 ,  H01L21/94

Abstract: A method of planarizing an electrically insulative layer formed over a non-planar integrated circuit substrate having raised portions. After the electrically insulative layers are deposited over such substrate, the layer has elevations corresponding to the underlying raised portions of the substrate. A masking layer is formed on the electrically insulative layer having at least one opening therethrough coincident with an elevation in the insulative layer; this opening has smaller lateral dimensions than the coincident elevation, thereby facilitating alignment. The elevation in the insulative layer exposed in said at least one opening is then etched to the level of the unelevated portion of the layer, and the insulative layer is then resputtered for a period of time sufficient to planarize the remainder of such etched elevation to the level of the unelevated portions.