SOI TYPE INTEGRATED CIRCUIT AND ITS FORMATION METHOD

    公开(公告)号:JPH07254653A

    公开(公告)日:1995-10-03

    申请号:JP11110493

    申请日:1993-04-14

    Applicant: IBM

    Abstract: PURPOSE: To form a thin silicon region for a CMOS and a thick silicon region for a bipolar region into an epitaxial device layer. CONSTITUTION: A set of oxide islands 20 is formed onto a first wafer. An epitaxial layer 30 is grown from a bipolar silicon region, and the oxide islands 20 are coated. The process is used as a step, when the bottom section of a bipolar region is formed. The first wafer is inverted, and an oxide is coupled with a second wafer 60 by the new grown epitaxial layer 30 in the lower sections of the oxide islands 20. Consequently, a new top face is formed in a high-quality epitaxial layer. Excess silicon is removed from the new top face, the top face is polished by using a nitride polishing stop layer until thickness on the oxide islands 20 reaches 1000 (Å), and the thick epitaxial silicon layer of 1 (μm) is left in the bipolar region, while the epitaxial silicon layer of thickness 1000 (Å) is left in a CMOS region.

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