-
公开(公告)号:DE69022018T2
公开(公告)日:1996-04-18
申请号:DE69022018
申请日:1990-11-27
Applicant: IBM
Inventor: CASANOVA WAYNE JOSEPH , CORFITS WILLIAM DALE , DIMMICK ROGER FRANCIS , THOMPSON GARY ALLEN , THORPE JAMES ROBERT , WHEELER STEPHEN EDWARD
Abstract: A double-sided central electronics complex (CEC) (20) is provided for increasing the logic card density in a logic cage or CEC. Specifically, two logic cages or sub-enclosures (22, 24) are integrated, sharing one backplane card so that logic elements may be plugged into the CEC from both sides. The CEC is formed by unitary sheet metal side plates, top and bottom cast or guides (26, 28) and a single double-sided backplane assembly (38).
-
公开(公告)号:DE69112145T2
公开(公告)日:1996-05-02
申请号:DE69112145
申请日:1991-06-27
Applicant: IBM
Inventor: DIMMICK ROGER FRANCIS , KLEVE VERNON JOHN , MEYER TIMOTHY LOUIS , THOMPSON GARY ALLEN , WESTPHAL GORDON WILBUR
Abstract: An enclosure for different subsystem variations of a data processing system has a box with front and rear regions separated by an interconnection carrier. The front is divided into standard-size bays for functional modules, while support modules slide into rear bays. A vertical central carrier contains electrical interconnections between the functional and support modules. An environmental module provides cooling air through the enclosure.
-
公开(公告)号:DE69112145D1
公开(公告)日:1995-09-21
申请号:DE69112145
申请日:1991-06-27
Applicant: IBM
Inventor: DIMMICK ROGER FRANCIS , KLEVE VERNON JOHN , MEYER TIMOTHY LOUIS , THOMPSON GARY ALLEN , WESTPHAL GORDON WILBUR
Abstract: An enclosure for different subsystem variations of a data processing system has a box with front and rear regions separated by an interconnection carrier. The front is divided into standard-size bays for functional modules, while support modules slide into rear bays. A vertical central carrier contains electrical interconnections between the functional and support modules. An environmental module provides cooling air through the enclosure.
-
公开(公告)号:DE69022018D1
公开(公告)日:1995-10-05
申请号:DE69022018
申请日:1990-11-27
Applicant: IBM
Inventor: CASANOVA WAYNE JOSEPH , CORFITS WILLIAM DALE , DIMMICK ROGER FRANCIS , THOMPSON GARY ALLEN , THORPE JAMES ROBERT , WHEELER STEPHEN EDWARD
Abstract: A double-sided central electronics complex (CEC) (20) is provided for increasing the logic card density in a logic cage or CEC. Specifically, two logic cages or sub-enclosures (22, 24) are integrated, sharing one backplane card so that logic elements may be plugged into the CEC from both sides. The CEC is formed by unitary sheet metal side plates, top and bottom cast or guides (26, 28) and a single double-sided backplane assembly (38).
-
-
-