公开(公告)号：MY124540A

公开(公告)日：2006-06-30

申请号：MYPI20010429

申请日：2001-01-31

Applicant: IBM

Inventor： ROBERT D SEBESTA ,  TIMOTHY F CARDEN ,  TODD W DAVIES ,  ROSS W KEESLER ,  DAVID B STONE ,  CHERYL L TYTRAN-PALOMAKI

IPC: H01L23/12 ,  H01R33/76 ,  H01L23/498 ,  H01R4/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/42

Abstract: AN ORGANIC INTEGRATED CIRCUIT CHIP CARRIER (14) FOR HIGH DENSITY INTEGRATED CIRCUIT CHIP (12) ATTACH, WHEREIN THE CONTACT PADS (32) OR MICROVIAS (22) WHICH PROVIDE ELECTRICAL INTERCONNECTIONS TO EXTERNAL CIRCUITRY ARE LOCATED IN A FIRST ARRAY PATTERN, WHILE THE PLATED THROUGH HOLES OR THROUGH-VIAS (50,52) ARE LOCATED IN A SECOND ARRAY PATTERN. THIS ALLOWS UTILIZATION OF WIRING CHANNELS (51) WITHIN THE CHIP CARRIER IN WHICH SIGNAL WIRING TRACES (40) CAN BE ROUTED.

公开(公告)号：SG99347A1

公开(公告)日：2003-10-27

申请号：SG200100662

申请日：2001-02-06

Applicant: IBM

Inventor： TIMOTHY F CARDEN ,  TODD W DAVIES ,  ROSS WILLIAM KEESLER ,  ROBERT D SEBESTA ,  DAVID B STONE ,  CHERYL L TYTRAN-PALOMAKI

IPC: H01L23/12 ,  H01L23/498 ,  H01R33/76 ,  H01R4/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/42 ,  H05K3/40 ,  H05K3/36

Abstract: An organic integrated circuit chip carrier for high density integrated circuit chip attach, wherein the contact pads or microvias which provide electrical interconnections to external circuitry are located in a first array pattern, while the plated through holes or through-vias are located in a second array pattern. This allows utilization of wiring channels within the chip carrier in which signal wiring traces can be routed.